1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 3 4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 5; WARN-NOT: warning 6 7; 8; INDEX (IMMEDIATES) 9; 10 11define <vscale x 16 x i8> @index_ii_i8() { 12; CHECK-LABEL: index_ii_i8: 13; CHECK: index z0.b, #-16, #15 14; CHECK-NEXT: ret 15 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 -16, i8 15) 16 ret <vscale x 16 x i8> %out 17} 18 19define <vscale x 8 x i16> @index_ii_i16() { 20; CHECK-LABEL: index_ii_i16: 21; CHECK: index z0.h, #15, #-16 22; CHECK-NEXT: ret 23 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 15, i16 -16) 24 ret <vscale x 8 x i16> %out 25} 26 27define <vscale x 4 x i32> @index_ii_i32() { 28; CHECK-LABEL: index_ii_i32: 29; CHECK: index z0.s, #-16, #15 30; CHECK-NEXT: ret 31 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 -16, i32 15) 32 ret <vscale x 4 x i32> %out 33} 34 35define <vscale x 2 x i64> @index_ii_i64() { 36; CHECK-LABEL: index_ii_i64: 37; CHECK: index z0.d, #15, #-16 38; CHECK-NEXT: ret 39 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 15, i64 -16) 40 ret <vscale x 2 x i64> %out 41} 42 43define <vscale x 2 x i64> @index_ii_range() { 44; CHECK-LABEL: index_ii_range: 45; CHECK: mov w8, #16 46; CHECK-NEXT: mov x9, #-17 47; CHECK-NEXT: index z0.d, x9, x8 48; CHECK-NEXT: ret 49 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 -17, i64 16) 50 ret <vscale x 2 x i64> %out 51} 52 53; 54; INDEX (IMMEDIATE, SCALAR) 55; 56 57define <vscale x 16 x i8> @index_ir_i8(i8 %a) { 58; CHECK-LABEL: index_ir_i8: 59; CHECK: index z0.b, #15, w0 60; CHECK-NEXT: ret 61 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 15, i8 %a) 62 ret <vscale x 16 x i8> %out 63} 64 65define <vscale x 8 x i16> @index_ir_i16(i16 %a) { 66; CHECK-LABEL: index_ir_i16: 67; CHECK: index z0.h, #-16, w0 68; CHECK-NEXT: ret 69 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 -16, i16 %a) 70 ret <vscale x 8 x i16> %out 71} 72 73define <vscale x 4 x i32> @index_ir_i32(i32 %a) { 74; CHECK-LABEL: index_ir_i32: 75; CHECK: index z0.s, #15, w0 76; CHECK-NEXT: ret 77 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 15, i32 %a) 78 ret <vscale x 4 x i32> %out 79} 80 81define <vscale x 2 x i64> @index_ir_i64(i64 %a) { 82; CHECK-LABEL: index_ir_i64: 83; CHECK: index z0.d, #-16, x0 84; CHECK-NEXT: ret 85 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 -16, i64 %a) 86 ret <vscale x 2 x i64> %out 87} 88 89define <vscale x 4 x i32> @index_ir_range(i32 %a) { 90; CHECK-LABEL: index_ir_range: 91; CHECK: mov w8, #-17 92; CHECK: index z0.s, w8, w0 93; CHECK-NEXT: ret 94 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 -17, i32 %a) 95 ret <vscale x 4 x i32> %out 96} 97 98; 99; INDEX (SCALAR, IMMEDIATE) 100; 101 102define <vscale x 16 x i8> @index_ri_i8(i8 %a) { 103; CHECK-LABEL: index_ri_i8: 104; CHECK: index z0.b, w0, #-16 105; CHECK-NEXT: ret 106 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 %a, i8 -16) 107 ret <vscale x 16 x i8> %out 108} 109 110define <vscale x 8 x i16> @index_ri_i16(i16 %a) { 111; CHECK-LABEL: index_ri_i16: 112; CHECK: index z0.h, w0, #15 113; CHECK-NEXT: ret 114 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %a, i16 15) 115 ret <vscale x 8 x i16> %out 116} 117 118define <vscale x 4 x i32> @index_ri_i32(i32 %a) { 119; CHECK-LABEL: index_ri_i32: 120; CHECK: index z0.s, w0, #-16 121; CHECK-NEXT: ret 122 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 %a, i32 -16) 123 ret <vscale x 4 x i32> %out 124} 125 126define <vscale x 2 x i64> @index_ri_i64(i64 %a) { 127; CHECK-LABEL: index_ri_i64: 128; CHECK: index z0.d, x0, #15 129; CHECK-NEXT: ret 130 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 %a, i64 15) 131 ret <vscale x 2 x i64> %out 132} 133 134define <vscale x 8 x i16> @index_ri_range(i16 %a) { 135; CHECK-LABEL: index_ri_range: 136; CHECK: mov w8, #16 137; CHECK: index z0.h, w0, w8 138; CHECK-NEXT: ret 139 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %a, i16 16) 140 ret <vscale x 8 x i16> %out 141} 142 143; 144; INDEX (SCALARS) 145; 146 147define <vscale x 16 x i8> @index_rr_i8(i8 %a, i8 %b) { 148; CHECK-LABEL: index_rr_i8: 149; CHECK: index z0.b, w0, w1 150; CHECK-NEXT: ret 151 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 %a, i8 %b) 152 ret <vscale x 16 x i8> %out 153} 154 155define <vscale x 8 x i16> @index_rr_i16(i16 %a, i16 %b) { 156; CHECK-LABEL: index_rr_i16: 157; CHECK: index z0.h, w0, w1 158; CHECK-NEXT: ret 159 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %a, i16 %b) 160 ret <vscale x 8 x i16> %out 161} 162 163define <vscale x 4 x i32> @index_rr_i32(i32 %a, i32 %b) { 164; CHECK-LABEL: index_rr_i32: 165; CHECK: index z0.s, w0, w1 166; CHECK-NEXT: ret 167 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 %a, i32 %b) 168 ret <vscale x 4 x i32> %out 169} 170 171define <vscale x 2 x i64> @index_rr_i64(i64 %a, i64 %b) { 172; CHECK-LABEL: index_rr_i64: 173; CHECK: index z0.d, x0, x1 174; CHECK-NEXT: ret 175 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 %a, i64 %b) 176 ret <vscale x 2 x i64> %out 177} 178 179declare <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8, i8) 180declare <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16, i16) 181declare <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32, i32) 182declare <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64, i64) 183