1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 3 4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 5; WARN-NOT: warning 6 7; 8; WHILELE 9; 10 11define <vscale x 16 x i1> @whilele_b_ww(i32 %a, i32 %b) { 12; CHECK-LABEL: whilele_b_ww: 13; CHECK: whilele p0.b, w0, w1 14; CHECK-NEXT: ret 15 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilele.nxv16i1.i32(i32 %a, i32 %b) 16 ret <vscale x 16 x i1> %out 17} 18 19define <vscale x 16 x i1> @whilele_b_xx(i64 %a, i64 %b) { 20; CHECK-LABEL: whilele_b_xx: 21; CHECK: whilele p0.b, x0, x1 22; CHECK-NEXT: ret 23 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilele.nxv16i1.i64(i64 %a, i64 %b) 24 ret <vscale x 16 x i1> %out 25} 26 27define <vscale x 8 x i1> @whilele_h_ww(i32 %a, i32 %b) { 28; CHECK-LABEL: whilele_h_ww: 29; CHECK: whilele p0.h, w0, w1 30; CHECK-NEXT: ret 31 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilele.nxv8i1.i32(i32 %a, i32 %b) 32 ret <vscale x 8 x i1> %out 33} 34 35define <vscale x 8 x i1> @whilele_h_xx(i64 %a, i64 %b) { 36; CHECK-LABEL: whilele_h_xx: 37; CHECK: whilele p0.h, x0, x1 38; CHECK-NEXT: ret 39 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilele.nxv8i1.i64(i64 %a, i64 %b) 40 ret <vscale x 8 x i1> %out 41} 42 43define <vscale x 4 x i1> @whilele_s_ww(i32 %a, i32 %b) { 44; CHECK-LABEL: whilele_s_ww: 45; CHECK: whilele p0.s, w0, w1 46; CHECK-NEXT: ret 47 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilele.nxv4i1.i32(i32 %a, i32 %b) 48 ret <vscale x 4 x i1> %out 49} 50 51define <vscale x 4 x i1> @whilele_s_xx(i64 %a, i64 %b) { 52; CHECK-LABEL: whilele_s_xx: 53; CHECK: whilele p0.s, x0, x1 54; CHECK-NEXT: ret 55 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilele.nxv4i1.i64(i64 %a, i64 %b) 56 ret <vscale x 4 x i1> %out 57} 58 59define <vscale x 2 x i1> @whilele_d_ww(i32 %a, i32 %b) { 60; CHECK-LABEL: whilele_d_ww: 61; CHECK: whilele p0.d, w0, w1 62; CHECK-NEXT: ret 63 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilele.nxv2i1.i32(i32 %a, i32 %b) 64 ret <vscale x 2 x i1> %out 65} 66 67define <vscale x 2 x i1> @whilele_d_xx(i64 %a, i64 %b) { 68; CHECK-LABEL: whilele_d_xx: 69; CHECK: whilele p0.d, x0, x1 70; CHECK-NEXT: ret 71 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilele.nxv2i1.i64(i64 %a, i64 %b) 72 ret <vscale x 2 x i1> %out 73} 74 75; 76; WHILELO 77; 78 79define <vscale x 16 x i1> @whilelo_b_ww(i32 %a, i32 %b) { 80; CHECK-LABEL: whilelo_b_ww: 81; CHECK: whilelo p0.b, w0, w1 82; CHECK-NEXT: ret 83 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 %a, i32 %b) 84 ret <vscale x 16 x i1> %out 85} 86 87define <vscale x 16 x i1> @whilelo_b_xx(i64 %a, i64 %b) { 88; CHECK-LABEL: whilelo_b_xx: 89; CHECK: whilelo p0.b, x0, x1 90; CHECK-NEXT: ret 91 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 %a, i64 %b) 92 ret <vscale x 16 x i1> %out 93} 94 95define <vscale x 8 x i1> @whilelo_h_ww(i32 %a, i32 %b) { 96; CHECK-LABEL: whilelo_h_ww: 97; CHECK: whilelo p0.h, w0, w1 98; CHECK-NEXT: ret 99 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 %a, i32 %b) 100 ret <vscale x 8 x i1> %out 101} 102 103define <vscale x 8 x i1> @whilelo_h_xx(i64 %a, i64 %b) { 104; CHECK-LABEL: whilelo_h_xx: 105; CHECK: whilelo p0.h, x0, x1 106; CHECK-NEXT: ret 107 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 %a, i64 %b) 108 ret <vscale x 8 x i1> %out 109} 110 111define <vscale x 4 x i1> @whilelo_s_ww(i32 %a, i32 %b) { 112; CHECK-LABEL: whilelo_s_ww: 113; CHECK: whilelo p0.s, w0, w1 114; CHECK-NEXT: ret 115 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 %a, i32 %b) 116 ret <vscale x 4 x i1> %out 117} 118 119define <vscale x 4 x i1> @whilelo_s_xx(i64 %a, i64 %b) { 120; CHECK-LABEL: whilelo_s_xx: 121; CHECK: whilelo p0.s, x0, x1 122; CHECK-NEXT: ret 123 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 %a, i64 %b) 124 ret <vscale x 4 x i1> %out 125} 126 127define <vscale x 2 x i1> @whilelo_d_ww(i32 %a, i32 %b) { 128; CHECK-LABEL: whilelo_d_ww: 129; CHECK: whilelo p0.d, w0, w1 130; CHECK-NEXT: ret 131 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 %a, i32 %b) 132 ret <vscale x 2 x i1> %out 133} 134 135define <vscale x 2 x i1> @whilelo_d_xx(i64 %a, i64 %b) { 136; CHECK-LABEL: whilelo_d_xx: 137; CHECK: whilelo p0.d, x0, x1 138; CHECK-NEXT: ret 139 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 %a, i64 %b) 140 ret <vscale x 2 x i1> %out 141} 142 143; 144; WHILELS 145; 146 147define <vscale x 16 x i1> @whilels_b_ww(i32 %a, i32 %b) { 148; CHECK-LABEL: whilels_b_ww: 149; CHECK: whilels p0.b, w0, w1 150; CHECK-NEXT: ret 151 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilels.nxv16i1.i32(i32 %a, i32 %b) 152 ret <vscale x 16 x i1> %out 153} 154 155define <vscale x 16 x i1> @whilels_b_xx(i64 %a, i64 %b) { 156; CHECK-LABEL: whilels_b_xx: 157; CHECK: whilels p0.b, x0, x1 158; CHECK-NEXT: ret 159 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilels.nxv16i1.i64(i64 %a, i64 %b) 160 ret <vscale x 16 x i1> %out 161} 162 163define <vscale x 8 x i1> @whilels_h_ww(i32 %a, i32 %b) { 164; CHECK-LABEL: whilels_h_ww: 165; CHECK: whilels p0.h, w0, w1 166; CHECK-NEXT: ret 167 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilels.nxv8i1.i32(i32 %a, i32 %b) 168 ret <vscale x 8 x i1> %out 169} 170 171define <vscale x 8 x i1> @whilels_h_xx(i64 %a, i64 %b) { 172; CHECK-LABEL: whilels_h_xx: 173; CHECK: whilels p0.h, x0, x1 174; CHECK-NEXT: ret 175 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilels.nxv8i1.i64(i64 %a, i64 %b) 176 ret <vscale x 8 x i1> %out 177} 178 179define <vscale x 4 x i1> @whilels_s_ww(i32 %a, i32 %b) { 180; CHECK-LABEL: whilels_s_ww: 181; CHECK: whilels p0.s, w0, w1 182; CHECK-NEXT: ret 183 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilels.nxv4i1.i32(i32 %a, i32 %b) 184 ret <vscale x 4 x i1> %out 185} 186 187define <vscale x 4 x i1> @whilels_s_xx(i64 %a, i64 %b) { 188; CHECK-LABEL: whilels_s_xx: 189; CHECK: whilels p0.s, x0, x1 190; CHECK-NEXT: ret 191 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilels.nxv4i1.i64(i64 %a, i64 %b) 192 ret <vscale x 4 x i1> %out 193} 194 195define <vscale x 2 x i1> @whilels_d_ww(i32 %a, i32 %b) { 196; CHECK-LABEL: whilels_d_ww: 197; CHECK: whilels p0.d, w0, w1 198; CHECK-NEXT: ret 199 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilels.nxv2i1.i32(i32 %a, i32 %b) 200 ret <vscale x 2 x i1> %out 201} 202 203define <vscale x 2 x i1> @whilels_d_xx(i64 %a, i64 %b) { 204; CHECK-LABEL: whilels_d_xx: 205; CHECK: whilels p0.d, x0, x1 206; CHECK-NEXT: ret 207 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilels.nxv2i1.i64(i64 %a, i64 %b) 208 ret <vscale x 2 x i1> %out 209} 210 211; 212; WHILELT 213; 214 215define <vscale x 16 x i1> @whilelt_b_ww(i32 %a, i32 %b) { 216; CHECK-LABEL: whilelt_b_ww: 217; CHECK: whilelt p0.b, w0, w1 218; CHECK-NEXT: ret 219 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 %a, i32 %b) 220 ret <vscale x 16 x i1> %out 221} 222 223define <vscale x 16 x i1> @whilelt_b_xx(i64 %a, i64 %b) { 224; CHECK-LABEL: whilelt_b_xx: 225; CHECK: whilelt p0.b, x0, x1 226; CHECK-NEXT: ret 227 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 %a, i64 %b) 228 ret <vscale x 16 x i1> %out 229} 230 231define <vscale x 8 x i1> @whilelt_h_ww(i32 %a, i32 %b) { 232; CHECK-LABEL: whilelt_h_ww: 233; CHECK: whilelt p0.h, w0, w1 234; CHECK-NEXT: ret 235 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 %a, i32 %b) 236 ret <vscale x 8 x i1> %out 237} 238 239define <vscale x 8 x i1> @whilelt_h_xx(i64 %a, i64 %b) { 240; CHECK-LABEL: whilelt_h_xx: 241; CHECK: whilelt p0.h, x0, x1 242; CHECK-NEXT: ret 243 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 %a, i64 %b) 244 ret <vscale x 8 x i1> %out 245} 246 247define <vscale x 4 x i1> @whilelt_s_ww(i32 %a, i32 %b) { 248; CHECK-LABEL: whilelt_s_ww: 249; CHECK: whilelt p0.s, w0, w1 250; CHECK-NEXT: ret 251 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 %a, i32 %b) 252 ret <vscale x 4 x i1> %out 253} 254 255define <vscale x 4 x i1> @whilelt_s_xx(i64 %a, i64 %b) { 256; CHECK-LABEL: whilelt_s_xx: 257; CHECK: whilelt p0.s, x0, x1 258; CHECK-NEXT: ret 259 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 %a, i64 %b) 260 ret <vscale x 4 x i1> %out 261} 262 263define <vscale x 2 x i1> @whilelt_d_ww(i32 %a, i32 %b) { 264; CHECK-LABEL: whilelt_d_ww: 265; CHECK: whilelt p0.d, w0, w1 266; CHECK-NEXT: ret 267 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 %a, i32 %b) 268 ret <vscale x 2 x i1> %out 269} 270 271define <vscale x 2 x i1> @whilelt_d_xx(i64 %a, i64 %b) { 272; CHECK-LABEL: whilelt_d_xx: 273; CHECK: whilelt p0.d, x0, x1 274; CHECK-NEXT: ret 275 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 %a, i64 %b) 276 ret <vscale x 2 x i1> %out 277} 278 279declare <vscale x 16 x i1> @llvm.aarch64.sve.whilele.nxv16i1.i32(i32, i32) 280declare <vscale x 16 x i1> @llvm.aarch64.sve.whilele.nxv16i1.i64(i64, i64) 281declare <vscale x 8 x i1> @llvm.aarch64.sve.whilele.nxv8i1.i32(i32, i32) 282declare <vscale x 8 x i1> @llvm.aarch64.sve.whilele.nxv8i1.i64(i64, i64) 283declare <vscale x 4 x i1> @llvm.aarch64.sve.whilele.nxv4i1.i32(i32, i32) 284declare <vscale x 4 x i1> @llvm.aarch64.sve.whilele.nxv4i1.i64(i64, i64) 285declare <vscale x 2 x i1> @llvm.aarch64.sve.whilele.nxv2i1.i32(i32, i32) 286declare <vscale x 2 x i1> @llvm.aarch64.sve.whilele.nxv2i1.i64(i64, i64) 287 288declare <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32, i32) 289declare <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64, i64) 290declare <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32, i32) 291declare <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64, i64) 292declare <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32, i32) 293declare <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64, i64) 294declare <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32, i32) 295declare <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64, i64) 296 297declare <vscale x 16 x i1> @llvm.aarch64.sve.whilels.nxv16i1.i32(i32, i32) 298declare <vscale x 16 x i1> @llvm.aarch64.sve.whilels.nxv16i1.i64(i64, i64) 299declare <vscale x 8 x i1> @llvm.aarch64.sve.whilels.nxv8i1.i32(i32, i32) 300declare <vscale x 8 x i1> @llvm.aarch64.sve.whilels.nxv8i1.i64(i64, i64) 301declare <vscale x 4 x i1> @llvm.aarch64.sve.whilels.nxv4i1.i32(i32, i32) 302declare <vscale x 4 x i1> @llvm.aarch64.sve.whilels.nxv4i1.i64(i64, i64) 303declare <vscale x 2 x i1> @llvm.aarch64.sve.whilels.nxv2i1.i32(i32, i32) 304declare <vscale x 2 x i1> @llvm.aarch64.sve.whilels.nxv2i1.i64(i64, i64) 305 306declare <vscale x 16 x i1> @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32, i32) 307declare <vscale x 16 x i1> @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64, i64) 308declare <vscale x 8 x i1> @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32, i32) 309declare <vscale x 8 x i1> @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64, i64) 310declare <vscale x 4 x i1> @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32, i32) 311declare <vscale x 4 x i1> @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64, i64) 312declare <vscale x 2 x i1> @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32, i32) 313declare <vscale x 2 x i1> @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64, i64) 314