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1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s 2>%t | FileCheck %s
2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
3
4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
5; WARN-NOT: warning
6
7;
8; FMLALB (Vectors)
9;
10
11define <vscale x 4 x float> @fmlalb_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
12; CHECK-LABEL: fmlalb_h:
13; CHECK: fmlalb z0.s, z1.h, z2.h
14; CHECK-NEXT: ret
15  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.nxv4f32(<vscale x 4 x float> %a,
16                                                                    <vscale x 8 x half> %b,
17                                                                    <vscale x 8 x half> %c)
18  ret <vscale x 4 x float> %out
19}
20
21;
22; FMLALB (Indexed)
23;
24
25define <vscale x 4 x float> @fmlalb_lane_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
26; CHECK-LABEL: fmlalb_lane_h:
27; CHECK: fmlalb z0.s, z1.h, z2.h[0]
28; CHECK-NEXT: ret
29  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.lane.nxv4f32(<vscale x 4 x float> %a,
30                                                                         <vscale x 8 x half> %b,
31                                                                         <vscale x 8 x half> %c,
32                                                                         i32 0)
33  ret <vscale x 4 x float> %out
34}
35
36;
37; FMLALT (Vectors)
38;
39
40define <vscale x 4 x float> @fmlalt_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
41; CHECK-LABEL: fmlalt_h:
42; CHECK: fmlalt z0.s, z1.h, z2.h
43; CHECK-NEXT: ret
44  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.nxv4f32(<vscale x 4 x float> %a,
45                                                                    <vscale x 8 x half> %b,
46                                                                    <vscale x 8 x half> %c)
47  ret <vscale x 4 x float> %out
48}
49
50;
51; FMLALT (Indexed)
52;
53
54define <vscale x 4 x float> @fmlalt_lane_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
55; CHECK-LABEL: fmlalt_lane_h:
56; CHECK: fmlalt z0.s, z1.h, z2.h[1]
57; CHECK-NEXT: ret
58  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.lane.nxv4f32(<vscale x 4 x float> %a,
59                                                                         <vscale x 8 x half> %b,
60                                                                         <vscale x 8 x half> %c,
61                                                                         i32 1)
62  ret <vscale x 4 x float> %out
63}
64
65;
66; FMLSLB (Vectors)
67;
68
69define <vscale x 4 x float> @fmlslb_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
70; CHECK-LABEL: fmlslb_h:
71; CHECK: fmlslb z0.s, z1.h, z2.h
72; CHECK-NEXT: ret
73  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.nxv4f32(<vscale x 4 x float> %a,
74                                                                    <vscale x 8 x half> %b,
75                                                                    <vscale x 8 x half> %c)
76  ret <vscale x 4 x float> %out
77}
78
79;
80; FMLSLB (Indexed)
81;
82
83define <vscale x 4 x float> @fmlslb_lane_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
84; CHECK-LABEL: fmlslb_lane_h:
85; CHECK: fmlslb z0.s, z1.h, z2.h[2]
86; CHECK-NEXT: ret
87  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.lane.nxv4f32(<vscale x 4 x float> %a,
88                                                                         <vscale x 8 x half> %b,
89                                                                         <vscale x 8 x half> %c,
90                                                                         i32 2)
91  ret <vscale x 4 x float> %out
92}
93
94;
95; FMLSLT (Vectors)
96;
97
98define <vscale x 4 x float> @fmlslt_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
99; CHECK-LABEL: fmlslt_h:
100; CHECK: fmlslt z0.s, z1.h, z2.h
101; CHECK-NEXT: ret
102  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.nxv4f32(<vscale x 4 x float> %a,
103                                                                    <vscale x 8 x half> %b,
104                                                                    <vscale x 8 x half> %c)
105 ret <vscale x 4 x float> %out
106}
107
108;
109; FMLSLT (Indexed)
110;
111
112define <vscale x 4 x float> @fmlslt_lane_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
113; CHECK-LABEL: fmlslt_lane_h:
114; CHECK: fmlslt z0.s, z1.h, z2.h[3]
115; CHECK-NEXT: ret
116  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.lane.nxv4f32(<vscale x 4 x float> %a,
117                                                                         <vscale x 8 x half> %b,
118                                                                         <vscale x 8 x half> %c,
119                                                                         i32 3)
120  ret <vscale x 4 x float> %out
121}
122
123declare <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>)
124declare <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.lane.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
125declare <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>)
126declare <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.lane.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
127
128declare <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>)
129declare <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.lane.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
130declare <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>)
131declare <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.lane.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
132