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1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s 2>%t | FileCheck %s
2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
3
4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
5; WARN-NOT: warning
6
7;
8; STNT1B, STNT1W, STNT1H, STNT1D: base + 64-bit unscaled offset
9;   e.g. stnt1h { z0.d }, p0, [z1.d, x0]
10;
11
12define void @sstnt1b_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i8* %base, <vscale x 2 x i64> %b) {
13; CHECK-LABEL: sstnt1b_d:
14; CHECK: stnt1b { z0.d }, p0, [z1.d, x0]
15; CHECK-NEXT: ret
16  %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
17  call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8(<vscale x 2 x i8> %data_trunc,
18                                                   <vscale x 2 x i1> %pg,
19                                                   i8* %base,
20                                                   <vscale x 2 x i64> %b)
21  ret void
22}
23
24define void @sstnt1h_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i16* %base, <vscale x 2 x i64> %b) {
25; CHECK-LABEL: sstnt1h_d:
26; CHECK: stnt1h { z0.d }, p0, [z1.d, x0]
27; CHECK-NEXT: ret
28  %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
29  call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16(<vscale x 2 x i16> %data_trunc,
30                                                    <vscale x 2 x i1> %pg,
31                                                    i16* %base,
32                                                    <vscale x 2 x i64> %b)
33  ret void
34}
35
36define void @sstnt1w_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i32* %base, <vscale x 2 x i64> %b) {
37; CHECK-LABEL: sstnt1w_d:
38; CHECK: stnt1w { z0.d }, p0, [z1.d, x0]
39; CHECK-NEXT: ret
40  %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
41  call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32(<vscale x 2 x i32> %data_trunc,
42                                                    <vscale x 2 x i1> %pg,
43                                                    i32* %base,
44                                                    <vscale x 2 x i64> %b)
45  ret void
46}
47
48define void @sstnt1d_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i64* %base, <vscale x 2 x i64> %b) {
49; CHECK-LABEL: sstnt1d_d:
50; CHECK: stnt1d { z0.d }, p0, [z1.d, x0]
51; CHECK-NEXT: ret
52  call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64(<vscale x 2 x i64> %data,
53                                                    <vscale x 2 x i1> %pg,
54                                                    i64* %base,
55                                                    <vscale x 2 x i64> %b)
56  ret void
57}
58
59define void @sstnt1d_d_double(<vscale x 2 x double> %data, <vscale x 2 x i1> %pg, double* %base, <vscale x 2 x i64> %b) {
60; CHECK-LABEL: sstnt1d_d_double:
61; CHECK: stnt1d { z0.d }, p0, [z1.d, x0]
62; CHECK-NEXT: ret
63  call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64(<vscale x 2 x double> %data,
64                                                    <vscale x 2 x i1> %pg,
65                                                    double* %base,
66                                                    <vscale x 2 x i64> %b)
67  ret void
68}
69
70declare void @llvm.aarch64.sve.stnt1.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i1>, i8*, <vscale x 2 x i64>)
71declare void @llvm.aarch64.sve.stnt1.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i1>, i16*, <vscale x 2 x i64>)
72declare void @llvm.aarch64.sve.stnt1.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, i32*, <vscale x 2 x i64>)
73declare void @llvm.aarch64.sve.stnt1.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i1>, i64*, <vscale x 2 x i64>)
74declare void @llvm.aarch64.sve.stnt1.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, double*, <vscale x 2 x i64>)
75