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1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s 2>%t | FileCheck %s
2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
3
4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
5; WARN-NOT: warning
6
7;
8; SADDLBT
9;
10
11define <vscale x 8 x i16> @saddlbt_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
12; CHECK-LABEL: saddlbt_b:
13; CHECK: saddlbt z0.h, z0.b, z1.b
14; CHECK-NEXT: ret
15  %out = call <vscale x 8 x i16> @llvm.aarch64.sve.saddlbt.nxv8i16(<vscale x 16 x i8> %a,
16                                                              <vscale x 16 x i8> %b)
17  ret <vscale x 8 x i16> %out
18}
19
20define <vscale x 4 x i32> @saddlbt_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
21; CHECK-LABEL: saddlbt_h:
22; CHECK: saddlbt z0.s, z0.h, z1.h
23; CHECK-NEXT: ret
24  %out = call <vscale x 4 x i32> @llvm.aarch64.sve.saddlbt.nxv4i32(<vscale x 8 x i16> %a,
25                                                              <vscale x 8 x i16> %b)
26  ret <vscale x 4 x i32> %out
27}
28
29define <vscale x 2 x i64> @saddlbt_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
30; CHECK-LABEL: saddlbt_s:
31; CHECK: saddlbt z0.d, z0.s, z1.s
32; CHECK-NEXT: ret
33  %out = call <vscale x 2 x i64> @llvm.aarch64.sve.saddlbt.nxv2i64(<vscale x 4 x i32> %a,
34                                                              <vscale x 4 x i32> %b)
35  ret <vscale x 2 x i64> %out
36}
37
38;
39; SSUBLBT
40;
41
42define <vscale x 8 x i16> @ssublbt_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
43; CHECK-LABEL: ssublbt_b:
44; CHECK: ssublbt z0.h, z0.b, z1.b
45; CHECK-NEXT: ret
46  %out = call <vscale x 8 x i16> @llvm.aarch64.sve.ssublbt.nxv8i16(<vscale x 16 x i8> %a,
47                                                              <vscale x 16 x i8> %b)
48  ret <vscale x 8 x i16> %out
49}
50
51define <vscale x 4 x i32> @ssublbt_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
52; CHECK-LABEL: ssublbt_h:
53; CHECK: ssublbt z0.s, z0.h, z1.h
54; CHECK-NEXT: ret
55  %out = call <vscale x 4 x i32> @llvm.aarch64.sve.ssublbt.nxv4i32(<vscale x 8 x i16> %a,
56                                                              <vscale x 8 x i16> %b)
57  ret <vscale x 4 x i32> %out
58}
59
60define <vscale x 2 x i64> @ssublbt_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
61; CHECK-LABEL: ssublbt_s:
62; CHECK: ssublbt z0.d, z0.s, z1.s
63; CHECK-NEXT: ret
64  %out = call <vscale x 2 x i64> @llvm.aarch64.sve.ssublbt.nxv2i64(<vscale x 4 x i32> %a,
65                                                              <vscale x 4 x i32> %b)
66  ret <vscale x 2 x i64> %out
67}
68
69;
70; SSUBLTB
71;
72
73define <vscale x 8 x i16> @ssubltb_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
74; CHECK-LABEL: ssubltb_b:
75; CHECK: ssubltb z0.h, z0.b, z1.b
76; CHECK-NEXT: ret
77  %out = call <vscale x 8 x i16> @llvm.aarch64.sve.ssubltb.nxv8i16(<vscale x 16 x i8> %a,
78                                                              <vscale x 16 x i8> %b)
79  ret <vscale x 8 x i16> %out
80}
81
82define <vscale x 4 x i32> @ssubltb_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
83; CHECK-LABEL: ssubltb_h:
84; CHECK: ssubltb z0.s, z0.h, z1.h
85; CHECK-NEXT: ret
86  %out = call <vscale x 4 x i32> @llvm.aarch64.sve.ssubltb.nxv4i32(<vscale x 8 x i16> %a,
87                                                              <vscale x 8 x i16> %b)
88  ret <vscale x 4 x i32> %out
89}
90
91define <vscale x 2 x i64> @ssubltb_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
92; CHECK-LABEL: ssubltb_s:
93; CHECK: ssubltb z0.d, z0.s, z1.s
94; CHECK-NEXT: ret
95  %out = call <vscale x 2 x i64> @llvm.aarch64.sve.ssubltb.nxv2i64(<vscale x 4 x i32> %a,
96                                                              <vscale x 4 x i32> %b)
97  ret <vscale x 2 x i64> %out
98}
99
100declare <vscale x 8 x i16> @llvm.aarch64.sve.saddlbt.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
101declare <vscale x 4 x i32> @llvm.aarch64.sve.saddlbt.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
102declare <vscale x 2 x i64> @llvm.aarch64.sve.saddlbt.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
103
104declare <vscale x 8 x i16> @llvm.aarch64.sve.ssublbt.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
105declare <vscale x 4 x i32> @llvm.aarch64.sve.ssublbt.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
106declare <vscale x 2 x i64> @llvm.aarch64.sve.ssublbt.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
107
108declare <vscale x 8 x i16> @llvm.aarch64.sve.ssubltb.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
109declare <vscale x 4 x i32> @llvm.aarch64.sve.ssubltb.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
110declare <vscale x 2 x i64> @llvm.aarch64.sve.ssubltb.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
111