1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s 2>%t | FileCheck %s 2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 3 4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 5; WARN-NOT: warning 6 7; 8; SADALP 9; 10 11define <vscale x 8 x i16> @sadalp_i8(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 16 x i8> %b) { 12; CHECK-LABEL: sadalp_i8: 13; CHECK: sadalp z0.h, p0/m, z1.b 14; CHECK-NEXT: ret 15 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.sadalp.nxv8i16(<vscale x 8 x i1> %pg, 16 <vscale x 8 x i16> %a, 17 <vscale x 16 x i8> %b) 18 ret <vscale x 8 x i16> %out 19} 20 21define <vscale x 4 x i32> @sadalp_i16(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 8 x i16> %b) { 22; CHECK-LABEL: sadalp_i16: 23; CHECK: sadalp z0.s, p0/m, z1.h 24; CHECK-NEXT: ret 25 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.sadalp.nxv4i32(<vscale x 4 x i1> %pg, 26 <vscale x 4 x i32> %a, 27 <vscale x 8 x i16> %b) 28 ret <vscale x 4 x i32> %out 29} 30 31define <vscale x 2 x i64> @sadalp_i32(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 4 x i32> %b) { 32; CHECK-LABEL: sadalp_i32: 33; CHECK: sadalp z0.d, p0/m, z1.s 34; CHECK-NEXT: ret 35 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.sadalp.nxv2i64(<vscale x 2 x i1> %pg, 36 <vscale x 2 x i64> %a, 37 <vscale x 4 x i32> %b) 38 ret <vscale x 2 x i64> %out 39} 40 41; 42; UADALP 43; 44 45define <vscale x 8 x i16> @uadalp_i8(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 16 x i8> %b) { 46; CHECK-LABEL: uadalp_i8: 47; CHECK: uadalp z0.h, p0/m, z1.b 48; CHECK-NEXT: ret 49 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.uadalp.nxv8i16(<vscale x 8 x i1> %pg, 50 <vscale x 8 x i16> %a, 51 <vscale x 16 x i8> %b) 52 ret <vscale x 8 x i16> %out 53} 54 55define <vscale x 4 x i32> @uadalp_i16(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a, <vscale x 8 x i16> %b) { 56; CHECK-LABEL: uadalp_i16: 57; CHECK: uadalp z0.s, p0/m, z1.h 58; CHECK-NEXT: ret 59 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.uadalp.nxv4i32(<vscale x 4 x i1> %pg, 60 <vscale x 4 x i32> %a, 61 <vscale x 8 x i16> %b) 62 ret <vscale x 4 x i32> %out 63} 64 65define <vscale x 2 x i64> @uadalp_i32(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 4 x i32> %b) { 66; CHECK-LABEL: uadalp_i32: 67; CHECK: uadalp z0.d, p0/m, z1.s 68; CHECK-NEXT: ret 69 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uadalp.nxv2i64(<vscale x 2 x i1> %pg, 70 <vscale x 2 x i64> %a, 71 <vscale x 4 x i32> %b) 72 ret <vscale x 2 x i64> %out 73} 74 75declare <vscale x 8 x i16> @llvm.aarch64.sve.sadalp.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 16 x i8>) 76declare <vscale x 4 x i32> @llvm.aarch64.sve.sadalp.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 8 x i16>) 77declare <vscale x 2 x i64> @llvm.aarch64.sve.sadalp.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 4 x i32>) 78 79declare <vscale x 8 x i16> @llvm.aarch64.sve.uadalp.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 16 x i8>) 80declare <vscale x 4 x i32> @llvm.aarch64.sve.uadalp.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 8 x i16>) 81declare <vscale x 2 x i64> @llvm.aarch64.sve.uadalp.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 4 x i32>) 82