1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s 3 4; PR31754 5 6; The overflow check may be against the input rather than the sum. 7 8define i1 @uaddo_i64_increment_alt(i64 %x, i64* %p) { 9; CHECK-LABEL: uaddo_i64_increment_alt: 10; CHECK: // %bb.0: 11; CHECK-NEXT: adds x8, x0, #1 // =1 12; CHECK-NEXT: cset w0, hs 13; CHECK-NEXT: str x8, [x1] 14; CHECK-NEXT: ret 15 %a = add i64 %x, 1 16 store i64 %a, i64* %p 17 %ov = icmp eq i64 %x, -1 18 ret i1 %ov 19} 20 21; Make sure insertion is done correctly based on dominance. 22 23define i1 @uaddo_i64_increment_alt_dom(i64 %x, i64* %p) { 24; CHECK-LABEL: uaddo_i64_increment_alt_dom: 25; CHECK: // %bb.0: 26; CHECK-NEXT: adds x8, x0, #1 // =1 27; CHECK-NEXT: cset w0, hs 28; CHECK-NEXT: str x8, [x1] 29; CHECK-NEXT: ret 30 %ov = icmp eq i64 %x, -1 31 %a = add i64 %x, 1 32 store i64 %a, i64* %p 33 ret i1 %ov 34} 35 36; The overflow check may be against the input rather than the sum. 37 38define i1 @uaddo_i64_decrement_alt(i64 %x, i64* %p) { 39; CHECK-LABEL: uaddo_i64_decrement_alt: 40; CHECK: // %bb.0: 41; CHECK-NEXT: subs x8, x0, #1 // =1 42; CHECK-NEXT: cset w0, hs 43; CHECK-NEXT: str x8, [x1] 44; CHECK-NEXT: ret 45 %a = add i64 %x, -1 46 store i64 %a, i64* %p 47 %ov = icmp ne i64 %x, 0 48 ret i1 %ov 49} 50 51; Make sure insertion is done correctly based on dominance. 52 53define i1 @uaddo_i64_decrement_alt_dom(i64 %x, i64* %p) { 54; CHECK-LABEL: uaddo_i64_decrement_alt_dom: 55; CHECK: // %bb.0: 56; CHECK-NEXT: subs x8, x0, #1 // =1 57; CHECK-NEXT: cset w0, hs 58; CHECK-NEXT: str x8, [x1] 59; CHECK-NEXT: ret 60 %ov = icmp ne i64 %x, 0 61 %a = add i64 %x, -1 62 store i64 %a, i64* %p 63 ret i1 %ov 64} 65 66