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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
3
4define i32 @PR39657(i8* %p, i64 %x) {
5; CHECK-LABEL: PR39657:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    mvn x8, x1
8; CHECK-NEXT:    ldr w0, [x0, x8, lsl #2]
9; CHECK-NEXT:    ret
10  %sh = shl i64 %x, 2
11  %mul = xor i64 %sh, -4
12  %add.ptr = getelementptr inbounds i8, i8* %p, i64 %mul
13  %bc = bitcast i8* %add.ptr to i32*
14  %load = load i32, i32* %bc, align 4
15  ret i32 %load
16}
17
18define i32 @add_of_not(i32 %x, i32 %y) {
19; CHECK-LABEL: add_of_not:
20; CHECK:       // %bb.0:
21; CHECK-NEXT:    mvn w8, w1
22; CHECK-NEXT:    add w0, w8, w0
23; CHECK-NEXT:    ret
24  %t0 = sub i32 %x, %y
25  %r = add i32 %t0, -1
26  ret i32 %r
27}
28
29define i32 @add_of_not_decrement(i32 %x, i32 %y) {
30; CHECK-LABEL: add_of_not_decrement:
31; CHECK:       // %bb.0:
32; CHECK-NEXT:    mvn w8, w1
33; CHECK-NEXT:    add w0, w8, w0
34; CHECK-NEXT:    ret
35  %t0 = sub i32 %x, %y
36  %r = sub i32 %t0, 1
37  ret i32 %r
38}
39
40define <4 x i32> @vec_add_of_not(<4 x i32> %x, <4 x i32> %y) {
41; CHECK-LABEL: vec_add_of_not:
42; CHECK:       // %bb.0:
43; CHECK-NEXT:    mvn v1.16b, v1.16b
44; CHECK-NEXT:    add v0.4s, v1.4s, v0.4s
45; CHECK-NEXT:    ret
46  %t0 = sub <4 x i32> %x, %y
47  %r = add <4 x i32> %t0, <i32 -1, i32 -1, i32 -1, i32 -1>
48  ret <4 x i32> %r
49}
50
51define <4 x i32> @vec_add_of_not_decrement(<4 x i32> %x, <4 x i32> %y) {
52; CHECK-LABEL: vec_add_of_not_decrement:
53; CHECK:       // %bb.0:
54; CHECK-NEXT:    mvn v1.16b, v1.16b
55; CHECK-NEXT:    add v0.4s, v1.4s, v0.4s
56; CHECK-NEXT:    ret
57  %t0 = sub <4 x i32> %x, %y
58  %r = sub <4 x i32> %t0, <i32 1, i32 1, i32 1, i32 1>
59  ret <4 x i32> %r
60}
61
62define <4 x i32> @vec_add_of_not_with_undef(<4 x i32> %x, <4 x i32> %y) {
63; CHECK-LABEL: vec_add_of_not_with_undef:
64; CHECK:       // %bb.0:
65; CHECK-NEXT:    sub v0.4s, v0.4s, v1.4s
66; CHECK-NEXT:    movi v1.2d, #0xffffffffffffffff
67; CHECK-NEXT:    add v0.4s, v0.4s, v1.4s
68; CHECK-NEXT:    ret
69  %t0 = sub <4 x i32> %x, %y
70  %r = add <4 x i32> %t0, <i32 -1, i32 undef, i32 -1, i32 -1>
71  ret <4 x i32> %r
72}
73
74define <4 x i32> @vec_add_of_not_with_undef_decrement(<4 x i32> %x, <4 x i32> %y) {
75; CHECK-LABEL: vec_add_of_not_with_undef_decrement:
76; CHECK:       // %bb.0:
77; CHECK-NEXT:    sub v0.4s, v0.4s, v1.4s
78; CHECK-NEXT:    movi v1.4s, #1
79; CHECK-NEXT:    add v0.4s, v0.4s, v1.4s
80; CHECK-NEXT:    ret
81  %t0 = sub <4 x i32> %x, %y
82  %r = add <4 x i32> %t0, <i32 1, i32 undef, i32 1, i32 1>
83  ret <4 x i32> %r
84}
85