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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
3
4
5---
6name:            narrow_shl_s64_32_s64amt
7tracksRegLiveness: true
8body:             |
9  bb.0:
10    liveins: $vgpr0_vgpr1
11
12    ; CHECK-LABEL: name: narrow_shl_s64_32_s64amt
13    ; CHECK: liveins: $vgpr0_vgpr1
14    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
15    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
16    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
17    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[TRUNC]](s32)
18    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
19    %0:_(s64) = COPY $vgpr0_vgpr1
20    %1:_(s64) = G_CONSTANT i64 32
21    %2:_(s64) = G_SHL %0, %1
22    $vgpr0_vgpr1 = COPY %2
23...
24
25---
26name:            narrow_shl_s64_32
27tracksRegLiveness: true
28body:             |
29  bb.0:
30    liveins: $vgpr0_vgpr1
31
32    ; CHECK-LABEL: name: narrow_shl_s64_32
33    ; CHECK: liveins: $vgpr0_vgpr1
34    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
35    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
36    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
37    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[TRUNC]](s32)
38    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
39    %0:_(s64) = COPY $vgpr0_vgpr1
40    %1:_(s32) = G_CONSTANT i32 32
41    %2:_(s64) = G_SHL %0, %1
42    $vgpr0_vgpr1 = COPY %2
43...
44
45---
46name:            narrow_shl_s64_33
47tracksRegLiveness: true
48body:             |
49  bb.0:
50    liveins: $vgpr0_vgpr1
51
52    ; CHECK-LABEL: name: narrow_shl_s64_33
53    ; CHECK: liveins: $vgpr0_vgpr1
54    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
55    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
56    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
57    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
58    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
59    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C1]](s32), [[SHL]](s32)
60    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
61    %0:_(s64) = COPY $vgpr0_vgpr1
62    %1:_(s32) = G_CONSTANT i32 33
63    %2:_(s64) = G_SHL %0, %1
64    $vgpr0_vgpr1 = COPY %2
65...
66
67---
68name:            narrow_shl_s64_31
69tracksRegLiveness: true
70body:             |
71  bb.0:
72    liveins: $vgpr0_vgpr1
73
74    ; CHECK-LABEL: name: narrow_shl_s64_31
75    ; CHECK: liveins: $vgpr0_vgpr1
76    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
77    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
78    ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s32)
79    ; CHECK: $vgpr0_vgpr1 = COPY [[SHL]](s64)
80    %0:_(s64) = COPY $vgpr0_vgpr1
81    %1:_(s32) = G_CONSTANT i32 31
82    %2:_(s64) = G_SHL %0, %1
83    $vgpr0_vgpr1 = COPY %2
84...
85
86---
87name:            narrow_shl_s64_63
88tracksRegLiveness: true
89body:             |
90  bb.0:
91    liveins: $vgpr0_vgpr1
92
93    ; CHECK-LABEL: name: narrow_shl_s64_63
94    ; CHECK: liveins: $vgpr0_vgpr1
95    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
96    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
97    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
98    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
99    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
100    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C1]](s32), [[SHL]](s32)
101    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
102    %0:_(s64) = COPY $vgpr0_vgpr1
103    %1:_(s32) = G_CONSTANT i32 63
104    %2:_(s64) = G_SHL %0, %1
105    $vgpr0_vgpr1 = COPY %2
106...
107
108---
109name:            narrow_shl_s64_64
110tracksRegLiveness: true
111body:             |
112  bb.0:
113    liveins: $vgpr0_vgpr1
114
115    ; CHECK-LABEL: name: narrow_shl_s64_64
116    ; CHECK: liveins: $vgpr0_vgpr1
117    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
118    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
119    ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s32)
120    ; CHECK: $vgpr0_vgpr1 = COPY [[SHL]](s64)
121    %0:_(s64) = COPY $vgpr0_vgpr1
122    %1:_(s32) = G_CONSTANT i32 64
123    %2:_(s64) = G_SHL %0, %1
124    $vgpr0_vgpr1 = COPY %2
125...
126
127---
128name:            narrow_shl_s64_65
129tracksRegLiveness: true
130body:             |
131  bb.0:
132    liveins: $vgpr0_vgpr1
133
134    ; CHECK-LABEL: name: narrow_shl_s64_65
135    ; CHECK: liveins: $vgpr0_vgpr1
136    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
137    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65
138    ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s32)
139    ; CHECK: $vgpr0_vgpr1 = COPY [[SHL]](s64)
140    %0:_(s64) = COPY $vgpr0_vgpr1
141    %1:_(s32) = G_CONSTANT i32 65
142    %2:_(s64) = G_SHL %0, %1
143    $vgpr0_vgpr1 = COPY %2
144...
145
146---
147name:            narrow_shl_s32_16
148tracksRegLiveness: true
149body:             |
150  bb.0:
151    liveins: $vgpr0
152
153    ; CHECK-LABEL: name: narrow_shl_s32_16
154    ; CHECK: liveins: $vgpr0
155    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
156    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
157    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
158    ; CHECK: $vgpr0 = COPY [[SHL]](s32)
159    %0:_(s32) = COPY $vgpr0
160    %1:_(s32) = G_CONSTANT i32 16
161    %2:_(s32) = G_SHL %0, %1
162    $vgpr0 = COPY %2
163...
164
165---
166name:            narrow_shl_s32_17
167tracksRegLiveness: true
168body:             |
169  bb.0:
170    liveins: $vgpr0
171
172    ; CHECK-LABEL: name: narrow_shl_s32_17
173    ; CHECK: liveins: $vgpr0
174    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
175    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
176    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
177    ; CHECK: $vgpr0 = COPY [[SHL]](s32)
178    %0:_(s32) = COPY $vgpr0
179    %1:_(s32) = G_CONSTANT i32 17
180    %2:_(s32) = G_SHL %0, %1
181    $vgpr0 = COPY %2
182...
183
184---
185name:            narrow_shl_v2s32_17
186tracksRegLiveness: true
187body:             |
188  bb.0:
189    liveins: $vgpr0_vgpr1
190
191    ; CHECK-LABEL: name: narrow_shl_v2s32_17
192    ; CHECK: liveins: $vgpr0_vgpr1
193    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
194    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
195    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
196    ; CHECK: [[SHL:%[0-9]+]]:_(<2 x s32>) = G_SHL [[COPY]], [[BUILD_VECTOR]](<2 x s32>)
197    ; CHECK: $vgpr0_vgpr1 = COPY [[SHL]](<2 x s32>)
198    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
199    %1:_(s32) = G_CONSTANT i32 17
200    %2:_(<2 x s32>) = G_BUILD_VECTOR %1, %1
201    %3:_(<2 x s32>) = G_SHL %0, %2
202    $vgpr0_vgpr1 = COPY %3
203...
204