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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*'  %s -o /dev/null 2>&1 | FileCheck -check-prefix=SI-ERR %s
4
5# SI-ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.sin), %1:sgpr(s16) (in function: sin_s16_vs)
6# SI-ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.sin), %1:vgpr(s16) (in function: sin_s16_vv)
7
8---
9name: sin_s16_vs
10legalized: true
11regBankSelected: true
12tracksRegLiveness: true
13
14body: |
15  bb.0:
16    liveins: $sgpr0
17
18    ; CHECK-LABEL: name: sin_s16_vs
19    ; CHECK: liveins: $sgpr0
20    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
21    ; CHECK: [[V_SIN_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_SIN_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
22    ; CHECK: S_ENDPGM 0, implicit [[V_SIN_F16_e64_]]
23    %0:sgpr(s32) = COPY $sgpr0
24    %1:sgpr(s16) = G_TRUNC %0
25    %2:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.sin), %1
26    S_ENDPGM 0, implicit %2
27...
28
29---
30name: sin_s16_vv
31legalized: true
32regBankSelected: true
33tracksRegLiveness: true
34
35body: |
36  bb.0:
37    liveins: $vgpr0
38
39    ; CHECK-LABEL: name: sin_s16_vv
40    ; CHECK: liveins: $vgpr0
41    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
42    ; CHECK: %2:vgpr_32 = nofpexcept V_SIN_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
43    ; CHECK: S_ENDPGM 0, implicit %2
44    %0:vgpr(s32) = COPY $vgpr0
45    %1:vgpr(s16) = G_TRUNC %0
46    %2:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.sin), %1
47    S_ENDPGM 0, implicit %2
48...
49