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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
5
6# GFX6/7 selection should fail.
7# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -disable-gisel-legality-check -o - %s | FileCheck -check-prefix=GFX6 %s
8# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -disable-gisel-legality-check -o - %s | FileCheck -check-prefix=GFX6 %s
9
10---
11name:            atomicrmw_fadd_s32_region
12legalized:       true
13regBankSelected: true
14tracksRegLiveness: true
15body:             |
16  bb.0:
17    liveins: $vgpr0, $vgpr1
18
19    ; GFX8-LABEL: name: atomicrmw_fadd_s32_region
20    ; GFX8: liveins: $vgpr0, $vgpr1
21    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
22    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
23    ; GFX8: $m0 = S_MOV_B32 -1
24    ; GFX8: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
25    ; GFX8: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
26    ; GFX9-LABEL: name: atomicrmw_fadd_s32_region
27    ; GFX9: liveins: $vgpr0, $vgpr1
28    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
29    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
30    ; GFX9: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
31    ; GFX9: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
32    ; GFX6-LABEL: name: atomicrmw_fadd_s32_region
33    ; GFX6: liveins: $vgpr0, $vgpr1
34    ; GFX6: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
35    ; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
36    ; GFX6: $m0 = S_MOV_B32 -1
37    ; GFX6: [[ATOMICRMW_FADD:%[0-9]+]]:vgpr_32(s32) = G_ATOMICRMW_FADD [[COPY]](p2), [[COPY1]] :: (load store seq_cst 4, addrspace 2)
38    ; GFX6: $vgpr0 = COPY [[ATOMICRMW_FADD]](s32)
39    %0:vgpr(p2) = COPY $vgpr0
40    %1:vgpr(s32) = COPY $vgpr1
41    %2:vgpr(s32) = G_ATOMICRMW_FADD %0(p2), %1 :: (load store seq_cst 4, addrspace 2)
42    $vgpr0 = COPY %2
43
44...
45
46---
47name:            atomicrmw_fadd_s32_region_noret
48legalized:       true
49regBankSelected: true
50tracksRegLiveness: true
51body:             |
52  bb.0:
53    liveins: $vgpr0, $vgpr1
54
55    ; GFX8-LABEL: name: atomicrmw_fadd_s32_region_noret
56    ; GFX8: liveins: $vgpr0, $vgpr1
57    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
58    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
59    ; GFX8: $m0 = S_MOV_B32 -1
60    ; GFX8: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
61    ; GFX9-LABEL: name: atomicrmw_fadd_s32_region_noret
62    ; GFX9: liveins: $vgpr0, $vgpr1
63    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
64    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
65    ; GFX9: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
66    ; GFX6-LABEL: name: atomicrmw_fadd_s32_region_noret
67    ; GFX6: liveins: $vgpr0, $vgpr1
68    ; GFX6: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
69    ; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
70    ; GFX6: $m0 = S_MOV_B32 -1
71    ; GFX6: [[ATOMICRMW_FADD:%[0-9]+]]:vgpr(s32) = G_ATOMICRMW_FADD [[COPY]](p2), [[COPY1]] :: (load store seq_cst 4, addrspace 2)
72    %0:vgpr(p2) = COPY $vgpr0
73    %1:vgpr(s32) = COPY $vgpr1
74    %2:vgpr(s32) = G_ATOMICRMW_FADD %0(p2), %1 :: (load store seq_cst 4, addrspace 2)
75
76...
77
78---
79name:            atomicrmw_fadd_s32_region_gep4
80legalized:       true
81regBankSelected: true
82tracksRegLiveness: true
83body:             |
84  bb.0:
85    liveins: $vgpr0, $vgpr1
86
87    ; GFX8-LABEL: name: atomicrmw_fadd_s32_region_gep4
88    ; GFX8: liveins: $vgpr0, $vgpr1
89    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
90    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
91    ; GFX8: $m0 = S_MOV_B32 -1
92    ; GFX8: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 4, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
93    ; GFX8: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
94    ; GFX9-LABEL: name: atomicrmw_fadd_s32_region_gep4
95    ; GFX9: liveins: $vgpr0, $vgpr1
96    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
97    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
98    ; GFX9: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 4, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
99    ; GFX9: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
100    ; GFX6-LABEL: name: atomicrmw_fadd_s32_region_gep4
101    ; GFX6: liveins: $vgpr0, $vgpr1
102    ; GFX6: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
103    ; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
104    ; GFX6: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 4
105    ; GFX6: [[PTR_ADD:%[0-9]+]]:vgpr(p2) = G_PTR_ADD [[COPY]], [[C]](s32)
106    ; GFX6: $m0 = S_MOV_B32 -1
107    ; GFX6: [[ATOMICRMW_FADD:%[0-9]+]]:vgpr_32(s32) = G_ATOMICRMW_FADD [[PTR_ADD]](p2), [[COPY1]] :: (load store seq_cst 4, addrspace 2)
108    ; GFX6: $vgpr0 = COPY [[ATOMICRMW_FADD]](s32)
109    %0:vgpr(p2) = COPY $vgpr0
110    %1:vgpr(s32) = COPY $vgpr1
111    %2:vgpr(s32) = G_CONSTANT i32 4
112    %3:vgpr(p2) = G_PTR_ADD %0, %2
113    %4:vgpr(s32) = G_ATOMICRMW_FADD %3(p2), %1 :: (load store seq_cst 4, addrspace 2)
114    $vgpr0 = COPY %4
115
116...
117