1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -stop-after=irtranslator -o - %s | FileCheck %s 3 4; Test 64-bit pointer with 64-bit index 5define <2 x i32 addrspace(1)*> @vector_gep_v2p1_index_v2i64(<2 x i32 addrspace(1)*> %ptr, <2 x i64> %idx) { 6 ; CHECK-LABEL: name: vector_gep_v2p1_index_v2i64 7 ; CHECK: bb.1 (%ir-block.0): 8 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $sgpr30_sgpr31 9 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 10 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 11 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 12 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3 13 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4 14 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5 15 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6 16 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7 17 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 18 ; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32) 19 ; CHECK: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32) 20 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 21 ; CHECK: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32) 22 ; CHECK: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32) 23 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV2]](s64), [[MV3]](s64) 24 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 25 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64) 26 ; CHECK: [[MUL:%[0-9]+]]:_(<2 x s64>) = G_MUL [[BUILD_VECTOR1]], [[BUILD_VECTOR2]] 27 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(<2 x p1>) = G_PTR_ADD [[BUILD_VECTOR]], [[MUL]](<2 x s64>) 28 ; CHECK: [[COPY9:%[0-9]+]]:_(<2 x p1>) = COPY [[PTR_ADD]](<2 x p1>) 29 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY9]](<2 x p1>) 30 ; CHECK: $vgpr0 = COPY [[UV]](s32) 31 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 32 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 33 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 34 ; CHECK: [[COPY10:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 35 ; CHECK: S_SETPC_B64_return [[COPY10]], implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3 36 %gep = getelementptr i32, <2 x i32 addrspace(1)*> %ptr, <2 x i64> %idx 37 ret <2 x i32 addrspace(1)*> %gep 38} 39 40; Test 32-bit pointer with 32-bit index 41define <2 x i32 addrspace(3)*> @vector_gep_v2p3_index_v2i32(<2 x i32 addrspace(3)*> %ptr, <2 x i32> %idx) { 42 ; CHECK-LABEL: name: vector_gep_v2p3_index_v2i32 43 ; CHECK: bb.1 (%ir-block.0): 44 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr30_sgpr31 45 ; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 46 ; CHECK: [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr1 47 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 48 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3 49 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 50 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[COPY]](p3), [[COPY1]](p3) 51 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32) 52 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 53 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32) 54 ; CHECK: [[MUL:%[0-9]+]]:_(<2 x s32>) = G_MUL [[BUILD_VECTOR1]], [[BUILD_VECTOR2]] 55 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(<2 x p3>) = G_PTR_ADD [[BUILD_VECTOR]], [[MUL]](<2 x s32>) 56 ; CHECK: [[COPY5:%[0-9]+]]:_(<2 x p3>) = COPY [[PTR_ADD]](<2 x p3>) 57 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY5]](<2 x p3>) 58 ; CHECK: $vgpr0 = COPY [[UV]](s32) 59 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 60 ; CHECK: [[COPY6:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY4]] 61 ; CHECK: S_SETPC_B64_return [[COPY6]], implicit $vgpr0, implicit $vgpr1 62 %gep = getelementptr i32, <2 x i32 addrspace(3)*> %ptr, <2 x i32> %idx 63 ret <2 x i32 addrspace(3)*> %gep 64} 65 66; Test 64-bit pointer with 32-bit index 67define <2 x i32 addrspace(1)*> @vector_gep_v2p1_index_v2i32(<2 x i32 addrspace(1)*> %ptr, <2 x i32> %idx) { 68 ; CHECK-LABEL: name: vector_gep_v2p1_index_v2i32 69 ; CHECK: bb.1 (%ir-block.0): 70 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $sgpr30_sgpr31 71 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 72 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 73 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 74 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3 75 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4 76 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5 77 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 78 ; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32) 79 ; CHECK: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32) 80 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 81 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY4]](s32), [[COPY5]](s32) 82 ; CHECK: [[SEXT:%[0-9]+]]:_(<2 x s64>) = G_SEXT [[BUILD_VECTOR1]](<2 x s32>) 83 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 84 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64) 85 ; CHECK: [[MUL:%[0-9]+]]:_(<2 x s64>) = G_MUL [[SEXT]], [[BUILD_VECTOR2]] 86 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(<2 x p1>) = G_PTR_ADD [[BUILD_VECTOR]], [[MUL]](<2 x s64>) 87 ; CHECK: [[COPY7:%[0-9]+]]:_(<2 x p1>) = COPY [[PTR_ADD]](<2 x p1>) 88 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY7]](<2 x p1>) 89 ; CHECK: $vgpr0 = COPY [[UV]](s32) 90 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 91 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 92 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 93 ; CHECK: [[COPY8:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY6]] 94 ; CHECK: S_SETPC_B64_return [[COPY8]], implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3 95 %gep = getelementptr i32, <2 x i32 addrspace(1)*> %ptr, <2 x i32> %idx 96 ret <2 x i32 addrspace(1)*> %gep 97} 98 99; Test 64-bit pointer with 64-bit scalar index 100define <2 x i32 addrspace(1)*> @vector_gep_v2p1_index_i64(<2 x i32 addrspace(1)*> %ptr, i64 %idx) { 101 ; CHECK-LABEL: name: vector_gep_v2p1_index_i64 102 ; CHECK: bb.1 (%ir-block.0): 103 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $sgpr30_sgpr31 104 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 105 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 106 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 107 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3 108 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4 109 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5 110 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 111 ; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32) 112 ; CHECK: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32) 113 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 114 ; CHECK: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32) 115 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV2]](s64), [[MV2]](s64) 116 ; CHECK: [[COPY7:%[0-9]+]]:_(<2 x s64>) = COPY [[BUILD_VECTOR1]](<2 x s64>) 117 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 118 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64) 119 ; CHECK: [[MUL:%[0-9]+]]:_(<2 x s64>) = G_MUL [[COPY7]], [[BUILD_VECTOR2]] 120 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(<2 x p1>) = G_PTR_ADD [[BUILD_VECTOR]], [[MUL]](<2 x s64>) 121 ; CHECK: [[COPY8:%[0-9]+]]:_(<2 x p1>) = COPY [[PTR_ADD]](<2 x p1>) 122 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY8]](<2 x p1>) 123 ; CHECK: $vgpr0 = COPY [[UV]](s32) 124 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 125 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 126 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 127 ; CHECK: [[COPY9:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY6]] 128 ; CHECK: S_SETPC_B64_return [[COPY9]], implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3 129 %gep = getelementptr i32, <2 x i32 addrspace(1)*> %ptr, i64 %idx 130 ret <2 x i32 addrspace(1)*> %gep 131} 132 133; Test 64-bit pointer with 32-bit scalar index 134define <2 x i32 addrspace(1)*> @vector_gep_v2p1_index_i32(<2 x i32 addrspace(1)*> %ptr, i32 %idx) { 135 ; CHECK-LABEL: name: vector_gep_v2p1_index_i32 136 ; CHECK: bb.1 (%ir-block.0): 137 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $sgpr30_sgpr31 138 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 139 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 140 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 141 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3 142 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4 143 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 144 ; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32) 145 ; CHECK: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32) 146 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 147 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY4]](s32), [[COPY4]](s32) 148 ; CHECK: [[SEXT:%[0-9]+]]:_(<2 x s64>) = G_SEXT [[BUILD_VECTOR1]](<2 x s32>) 149 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 150 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64) 151 ; CHECK: [[MUL:%[0-9]+]]:_(<2 x s64>) = G_MUL [[SEXT]], [[BUILD_VECTOR2]] 152 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(<2 x p1>) = G_PTR_ADD [[BUILD_VECTOR]], [[MUL]](<2 x s64>) 153 ; CHECK: [[COPY6:%[0-9]+]]:_(<2 x p1>) = COPY [[PTR_ADD]](<2 x p1>) 154 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY6]](<2 x p1>) 155 ; CHECK: $vgpr0 = COPY [[UV]](s32) 156 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 157 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 158 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 159 ; CHECK: [[COPY7:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY5]] 160 ; CHECK: S_SETPC_B64_return [[COPY7]], implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3 161 %gep = getelementptr i32, <2 x i32 addrspace(1)*> %ptr, i32 %idx 162 ret <2 x i32 addrspace(1)*> %gep 163} 164 165; Test 64-bit pointer with 64-bit constant, non-splat 166define <2 x i32 addrspace(1)*> @vector_gep_v2p1_index_v2i64_constant(<2 x i32 addrspace(1)*> %ptr, <2 x i64> %idx) { 167 ; CHECK-LABEL: name: vector_gep_v2p1_index_v2i64_constant 168 ; CHECK: bb.1 (%ir-block.0): 169 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $sgpr30_sgpr31 170 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 171 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 172 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 173 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3 174 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4 175 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5 176 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6 177 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7 178 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 179 ; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32) 180 ; CHECK: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32) 181 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 182 ; CHECK: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32) 183 ; CHECK: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32) 184 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV2]](s64), [[MV3]](s64) 185 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 186 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 187 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C1]](s64) 188 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 189 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C2]](s64), [[C2]](s64) 190 ; CHECK: [[MUL:%[0-9]+]]:_(<2 x s64>) = G_MUL [[BUILD_VECTOR2]], [[BUILD_VECTOR3]] 191 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(<2 x p1>) = G_PTR_ADD [[BUILD_VECTOR]], [[MUL]](<2 x s64>) 192 ; CHECK: [[COPY9:%[0-9]+]]:_(<2 x p1>) = COPY [[PTR_ADD]](<2 x p1>) 193 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY9]](<2 x p1>) 194 ; CHECK: $vgpr0 = COPY [[UV]](s32) 195 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 196 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 197 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 198 ; CHECK: [[COPY10:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 199 ; CHECK: S_SETPC_B64_return [[COPY10]], implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3 200 %gep = getelementptr i32, <2 x i32 addrspace(1)*> %ptr, <2 x i64> <i64 1, i64 2> 201 ret <2 x i32 addrspace(1)*> %gep 202} 203