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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
3
4---
5name: test_fpext_f16_to_f32
6body: |
7  bb.0:
8    liveins: $vgpr0
9
10    ; CHECK-LABEL: name: test_fpext_f16_to_f32
11    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
12    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
13    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
14    ; CHECK: $vgpr0 = COPY [[FPEXT]](s32)
15    %0:_(s32) = COPY $vgpr0
16    %1:_(s16) = G_TRUNC %0
17    %2:_(s32) = G_FPEXT %1
18    $vgpr0 = COPY %2
19...
20
21---
22name: test_fpext_v2f16_to_v2f32
23body: |
24  bb.0:
25    liveins: $vgpr0
26
27    ; CHECK-LABEL: name: test_fpext_v2f16_to_v2f32
28    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
29    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
30    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)
31    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
32    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
33    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
34    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = nnan G_FPEXT [[TRUNC]](s16)
35    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s32) = nnan G_FPEXT [[TRUNC1]](s16)
36    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPEXT]](s32), [[FPEXT1]](s32)
37    ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
38    %0:_(<2 x s16>) = COPY $vgpr0
39    %1:_(<2 x s32>) = nnan G_FPEXT %0
40    $vgpr0_vgpr1 = COPY %1
41...
42
43---
44name: test_fpext_v2f16_to_v2f32_w_flags
45body: |
46  bb.0:
47    liveins: $vgpr0
48
49    ; CHECK-LABEL: name: test_fpext_v2f16_to_v2f32_w_flags
50    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
51    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
52    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)
53    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
54    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
55    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
56    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = nnan G_FPEXT [[TRUNC]](s16)
57    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s32) = nnan G_FPEXT [[TRUNC1]](s16)
58    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPEXT]](s32), [[FPEXT1]](s32)
59    ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
60    %0:_(<2 x s16>) = COPY $vgpr0
61    %1:_(<2 x s32>) = nnan G_FPEXT %0
62    $vgpr0_vgpr1 = COPY %1
63...
64
65---
66name: test_fpext_v3f16_to_v3f32
67body: |
68  bb.0:
69    liveins: $vgpr0_vgpr1_vgpr2
70    ; CHECK-LABEL: name: test_fpext_v3f16_to_v3f32
71    ; CHECK: [[COPY:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2
72    ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<6 x s16>)
73    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
74    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)
75    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
76    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
77    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
78    ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
79    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32)
80    ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
81    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
82    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16)
83    ; CHECK: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC2]](s16)
84    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[FPEXT]](s32), [[FPEXT1]](s32), [[FPEXT2]](s32)
85    ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
86    %0:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2
87    %1:_(<3 x s16>), %2:_(<3 x s16>) = G_UNMERGE_VALUES %0
88    %3:_(<3 x s32>) = G_FPEXT %1
89    $vgpr0_vgpr1_vgpr2 = COPY %3
90...
91
92---
93name: test_fpext_v4f16_to_v4f32
94body: |
95  bb.0:
96    liveins: $vgpr0
97
98    ; CHECK-LABEL: name: test_fpext_v4f16_to_v4f32
99    ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
100    ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>)
101    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
102    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)
103    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
104    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
105    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
106    ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
107    ; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32)
108    ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
109    ; CHECK: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32)
110    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
111    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16)
112    ; CHECK: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC2]](s16)
113    ; CHECK: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC3]](s16)
114    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[FPEXT]](s32), [[FPEXT1]](s32), [[FPEXT2]](s32), [[FPEXT3]](s32)
115    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)
116    %0:_(<4 x s16>) = G_IMPLICIT_DEF
117    %1:_(<4 x s32>) = G_FPEXT %0
118    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
119...
120
121---
122name: test_fpext_f32_to_f64
123body: |
124  bb.0:
125    liveins: $vgpr0
126
127    ; CHECK-LABEL: name: test_fpext_f32_to_f64
128    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
129    ; CHECK: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[COPY]](s32)
130    ; CHECK: $vgpr0_vgpr1 = COPY [[FPEXT]](s64)
131    %0:_(s32) = COPY $vgpr0
132    %1:_(s64) = G_FPEXT %0
133    $vgpr0_vgpr1 = COPY %1
134...
135
136---
137name: test_fpext_v2f32_to_v2f64
138body: |
139  bb.0:
140    liveins: $vgpr0_vgpr1
141
142    ; CHECK-LABEL: name: test_fpext_v2f32_to_v2f64
143    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
144    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
145    ; CHECK: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[UV]](s32)
146    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s64) = G_FPEXT [[UV1]](s32)
147    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FPEXT]](s64), [[FPEXT1]](s64)
148    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
149    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
150    %1:_(<2 x s64>) = G_FPEXT %0
151    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
152...
153
154---
155name: test_fpext_v3f32_to_v3f64
156body: |
157  bb.0:
158    liveins: $vgpr0_vgpr1_vgpr2
159
160    ; CHECK-LABEL: name: test_fpext_v3f32_to_v3f64
161    ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
162    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
163    ; CHECK: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[UV]](s32)
164    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s64) = G_FPEXT [[UV1]](s32)
165    ; CHECK: [[FPEXT2:%[0-9]+]]:_(s64) = G_FPEXT [[UV2]](s32)
166    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[FPEXT]](s64), [[FPEXT1]](s64), [[FPEXT2]](s64)
167    ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s64>)
168    %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
169    %1:_(<3 x s64>) = G_FPEXT %0
170    S_NOP 0, implicit %1
171
172...
173
174---
175name: test_fpext_v4f32_to_v4f64
176body: |
177  bb.0:
178    liveins: $vgpr0_vgpr1_vgpr2_vgpr3
179
180    ; CHECK-LABEL: name: test_fpext_v4f32_to_v4f64
181    ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
182    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
183    ; CHECK: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[UV]](s32)
184    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s64) = G_FPEXT [[UV1]](s32)
185    ; CHECK: [[FPEXT2:%[0-9]+]]:_(s64) = G_FPEXT [[UV2]](s32)
186    ; CHECK: [[FPEXT3:%[0-9]+]]:_(s64) = G_FPEXT [[UV3]](s32)
187    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[FPEXT]](s64), [[FPEXT1]](s64), [[FPEXT2]](s64), [[FPEXT3]](s64)
188    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>)
189    %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
190    %1:_(<4 x s64>) = G_FPEXT %0
191    $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1
192...
193
194---
195name: test_fpext_f16_to_f64
196body: |
197  bb.0:
198    liveins: $vgpr0
199
200    ; CHECK-LABEL: name: test_fpext_f16_to_f64
201    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
202    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
203    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
204    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s64) = G_FPEXT [[FPEXT]](s32)
205    ; CHECK: $vgpr0_vgpr1 = COPY [[FPEXT1]](s64)
206    %0:_(s32) = COPY $vgpr0
207    %1:_(s16) = G_TRUNC %0
208    %2:_(s64) = G_FPEXT %1
209    $vgpr0_vgpr1 = COPY %2
210...
211
212---
213name: test_fpext_v2f16_to_v2f64
214body: |
215  bb.0:
216    liveins: $vgpr0
217
218    ; CHECK-LABEL: name: test_fpext_v2f16_to_v2f64
219    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
220    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
221    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)
222    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
223    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
224    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
225    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = nnan G_FPEXT [[TRUNC]](s16)
226    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s64) = G_FPEXT [[FPEXT]](s32)
227    ; CHECK: [[FPEXT2:%[0-9]+]]:_(s32) = nnan G_FPEXT [[TRUNC1]](s16)
228    ; CHECK: [[FPEXT3:%[0-9]+]]:_(s64) = G_FPEXT [[FPEXT2]](s32)
229    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[FPEXT1]](s64), [[FPEXT3]](s64)
230    ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
231    %0:_(<2 x s16>) = COPY $vgpr0
232    %1:_(<2 x s64>) = nnan G_FPEXT %0
233    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
234...
235