1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s 3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s 4# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s 5 6--- 7name: test_smin_s32 8body: | 9 bb.0: 10 liveins: $vgpr0, $vgpr1 11 12 ; SI-LABEL: name: test_smin_s32 13 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 14 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 15 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[COPY]], [[COPY1]] 16 ; SI: $vgpr0 = COPY [[SMIN]](s32) 17 ; VI-LABEL: name: test_smin_s32 18 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 19 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 20 ; VI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[COPY]], [[COPY1]] 21 ; VI: $vgpr0 = COPY [[SMIN]](s32) 22 ; GFX9-LABEL: name: test_smin_s32 23 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 24 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 25 ; GFX9: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[COPY]], [[COPY1]] 26 ; GFX9: $vgpr0 = COPY [[SMIN]](s32) 27 %0:_(s32) = COPY $vgpr0 28 %1:_(s32) = COPY $vgpr1 29 %2:_(s32) = G_SMIN %0, %1 30 $vgpr0 = COPY %2 31... 32 33--- 34name: test_smin_s64 35body: | 36 bb.0: 37 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 38 39 ; SI-LABEL: name: test_smin_s64 40 ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 41 ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 42 ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]] 43 ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]] 44 ; SI: $vgpr0_vgpr1 = COPY [[SELECT]](s64) 45 ; VI-LABEL: name: test_smin_s64 46 ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 47 ; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 48 ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]] 49 ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]] 50 ; VI: $vgpr0_vgpr1 = COPY [[SELECT]](s64) 51 ; GFX9-LABEL: name: test_smin_s64 52 ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 53 ; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 54 ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]] 55 ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]] 56 ; GFX9: $vgpr0_vgpr1 = COPY [[SELECT]](s64) 57 %0:_(s64) = COPY $vgpr0_vgpr1 58 %1:_(s64) = COPY $vgpr2_vgpr3 59 %2:_(s64) = G_SMIN %0, %1 60 $vgpr0_vgpr1 = COPY %2 61... 62 63--- 64name: test_smin_s16 65body: | 66 bb.0: 67 liveins: $vgpr0, $vgpr1 68 69 ; SI-LABEL: name: test_smin_s16 70 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 71 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 72 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 73 ; SI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 16 74 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 75 ; SI: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 16 76 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]] 77 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) 78 ; SI: $vgpr0 = COPY [[COPY4]](s32) 79 ; VI-LABEL: name: test_smin_s16 80 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 81 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 82 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 83 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 84 ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC1]] 85 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) 86 ; VI: $vgpr0 = COPY [[ANYEXT]](s32) 87 ; GFX9-LABEL: name: test_smin_s16 88 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 89 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 90 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 91 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 92 ; GFX9: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC1]] 93 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) 94 ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) 95 %0:_(s32) = COPY $vgpr0 96 %1:_(s32) = COPY $vgpr1 97 %2:_(s16) = G_TRUNC %0 98 %3:_(s16) = G_TRUNC %1 99 %4:_(s16) = G_SMIN %2, %3 100 %5:_(s32) = G_ANYEXT %4 101 $vgpr0 = COPY %5 102... 103 104--- 105name: test_smin_s8 106body: | 107 bb.0: 108 liveins: $vgpr0, $vgpr1 109 110 ; SI-LABEL: name: test_smin_s8 111 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 112 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 113 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 114 ; SI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 8 115 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 116 ; SI: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 8 117 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]] 118 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) 119 ; SI: $vgpr0 = COPY [[COPY4]](s32) 120 ; VI-LABEL: name: test_smin_s8 121 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 122 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 123 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 124 ; VI: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 125 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[TRUNC]], [[C]](s16) 126 ; VI: [[ASHR:%[0-9]+]]:_(s16) = G_ASHR [[SHL]], [[C]](s16) 127 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 128 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[TRUNC1]], [[C]](s16) 129 ; VI: [[ASHR1:%[0-9]+]]:_(s16) = G_ASHR [[SHL1]], [[C]](s16) 130 ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[ASHR]], [[ASHR1]] 131 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) 132 ; VI: $vgpr0 = COPY [[ANYEXT]](s32) 133 ; GFX9-LABEL: name: test_smin_s8 134 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 135 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 136 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 137 ; GFX9: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 8 138 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SEXT_INREG]](s32) 139 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 140 ; GFX9: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 8 141 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SEXT_INREG1]](s32) 142 ; GFX9: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC1]] 143 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) 144 ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) 145 %0:_(s32) = COPY $vgpr0 146 %1:_(s32) = COPY $vgpr1 147 %2:_(s8) = G_TRUNC %0 148 %3:_(s8) = G_TRUNC %1 149 %4:_(s8) = G_SMIN %2, %3 150 %5:_(s32) = G_ANYEXT %4 151 $vgpr0 = COPY %5 152... 153 154--- 155name: test_smin_s17 156body: | 157 bb.0: 158 liveins: $vgpr0, $vgpr1 159 160 ; SI-LABEL: name: test_smin_s17 161 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 162 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 163 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 164 ; SI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 17 165 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 166 ; SI: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 17 167 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]] 168 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) 169 ; SI: $vgpr0 = COPY [[COPY4]](s32) 170 ; VI-LABEL: name: test_smin_s17 171 ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 172 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 173 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 174 ; VI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 17 175 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 176 ; VI: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 17 177 ; VI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]] 178 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) 179 ; VI: $vgpr0 = COPY [[COPY4]](s32) 180 ; GFX9-LABEL: name: test_smin_s17 181 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 182 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 183 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 184 ; GFX9: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 17 185 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 186 ; GFX9: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 17 187 ; GFX9: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]] 188 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) 189 ; GFX9: $vgpr0 = COPY [[COPY4]](s32) 190 %0:_(s32) = COPY $vgpr0 191 %1:_(s32) = COPY $vgpr1 192 %2:_(s17) = G_TRUNC %0 193 %3:_(s17) = G_TRUNC %1 194 %4:_(s17) = G_SMIN %2, %3 195 %5:_(s32) = G_ANYEXT %4 196 $vgpr0 = COPY %5 197... 198 199--- 200name: test_smin_v2s32 201body: | 202 bb.0: 203 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 204 205 ; SI-LABEL: name: test_smin_v2s32 206 ; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 207 ; SI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 208 ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 209 ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) 210 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV2]] 211 ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV3]] 212 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32) 213 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 214 ; VI-LABEL: name: test_smin_v2s32 215 ; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 216 ; VI: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 217 ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 218 ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) 219 ; VI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV2]] 220 ; VI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV3]] 221 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32) 222 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 223 ; GFX9-LABEL: name: test_smin_v2s32 224 ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 225 ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 226 ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 227 ; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) 228 ; GFX9: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV2]] 229 ; GFX9: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV3]] 230 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32) 231 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 232 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 233 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 234 %2:_(<2 x s32>) = G_SMIN %0, %1 235 $vgpr0_vgpr1 = COPY %2 236... 237 238--- 239name: test_smin_v3s32 240body: | 241 bb.0: 242 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 243 244 ; SI-LABEL: name: test_smin_v3s32 245 ; SI: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 246 ; SI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 247 ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 248 ; SI: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) 249 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV3]] 250 ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV4]] 251 ; SI: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[UV2]], [[UV5]] 252 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32), [[SMIN2]](s32) 253 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 254 ; VI-LABEL: name: test_smin_v3s32 255 ; VI: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 256 ; VI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 257 ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 258 ; VI: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) 259 ; VI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV3]] 260 ; VI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV4]] 261 ; VI: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[UV2]], [[UV5]] 262 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32), [[SMIN2]](s32) 263 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 264 ; GFX9-LABEL: name: test_smin_v3s32 265 ; GFX9: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 266 ; GFX9: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 267 ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 268 ; GFX9: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) 269 ; GFX9: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[UV]], [[UV3]] 270 ; GFX9: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[UV1]], [[UV4]] 271 ; GFX9: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[UV2]], [[UV5]] 272 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SMIN]](s32), [[SMIN1]](s32), [[SMIN2]](s32) 273 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 274 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 275 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 276 %2:_(<3 x s32>) = G_SMIN %0, %1 277 $vgpr0_vgpr1_vgpr2 = COPY %2 278... 279 280--- 281name: test_smin_v2s16 282body: | 283 bb.0: 284 liveins: $vgpr0, $vgpr1 285 286 ; SI-LABEL: name: test_smin_v2s16 287 ; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 288 ; SI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 289 ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 290 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 291 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 292 ; SI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) 293 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 294 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 295 ; SI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 16 296 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 297 ; SI: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 16 298 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]] 299 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 300 ; SI: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY4]], 16 301 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 302 ; SI: [[SEXT_INREG3:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY5]], 16 303 ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG2]], [[SEXT_INREG3]] 304 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 305 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) 306 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 307 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SMIN1]](s32) 308 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 309 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 310 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 311 ; SI: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 312 ; SI: $vgpr0 = COPY [[BITCAST2]](<2 x s16>) 313 ; VI-LABEL: name: test_smin_v2s16 314 ; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 315 ; VI: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 316 ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 317 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) 318 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 319 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 320 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 321 ; VI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) 322 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) 323 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 324 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) 325 ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC2]] 326 ; VI: [[SMIN1:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC1]], [[TRUNC3]] 327 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[SMIN]](s16) 328 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[SMIN1]](s16) 329 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C]](s32) 330 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL]] 331 ; VI: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 332 ; VI: $vgpr0 = COPY [[BITCAST2]](<2 x s16>) 333 ; GFX9-LABEL: name: test_smin_v2s16 334 ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 335 ; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 336 ; GFX9: [[SMIN:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[COPY]], [[COPY1]] 337 ; GFX9: $vgpr0 = COPY [[SMIN]](<2 x s16>) 338 %0:_(<2 x s16>) = COPY $vgpr0 339 %1:_(<2 x s16>) = COPY $vgpr1 340 %2:_(<2 x s16>) = G_SMIN %0, %1 341 $vgpr0 = COPY %2 342... 343 344--- 345name: test_smin_v3s16 346body: | 347 bb.0: 348 liveins: $vgpr0, $vgpr1 349 350 ; SI-LABEL: name: test_smin_v3s16 351 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 352 ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 353 ; SI: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 354 ; SI: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 355 ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 356 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 357 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 358 ; SI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 359 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 360 ; SI: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF2]](<4 x s16>) 361 ; SI: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) 362 ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 363 ; SI: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 364 ; SI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) 365 ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 366 ; SI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 367 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[BITCAST2]](s32) 368 ; SI: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 369 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]] 370 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 371 ; SI: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 16 372 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 373 ; SI: [[SEXT_INREG3:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 16 374 ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG2]], [[SEXT_INREG3]] 375 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 376 ; SI: [[SEXT_INREG4:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY4]], 16 377 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[BITCAST3]](s32) 378 ; SI: [[SEXT_INREG5:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY5]], 16 379 ; SI: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG4]], [[SEXT_INREG5]] 380 ; SI: [[DEF3:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF 381 ; SI: [[DEF4:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF 382 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) 383 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SMIN1]](s32) 384 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[SMIN2]](s32) 385 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 386 ; SI: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s32>) 387 ; VI-LABEL: name: test_smin_v3s16 388 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 389 ; VI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 390 ; VI: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 391 ; VI: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 392 ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 393 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) 394 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 395 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 396 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 397 ; VI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 398 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) 399 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 400 ; VI: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF2]](<4 x s16>) 401 ; VI: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) 402 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST2]](s32) 403 ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 404 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32) 405 ; VI: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 406 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST3]](s32) 407 ; VI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) 408 ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC3]] 409 ; VI: [[SMIN1:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC1]], [[TRUNC4]] 410 ; VI: [[SMIN2:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC2]], [[TRUNC5]] 411 ; VI: [[DEF3:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF 412 ; VI: [[DEF4:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF 413 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN]](s16) 414 ; VI: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN1]](s16) 415 ; VI: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[SMIN2]](s16) 416 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32) 417 ; VI: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s32>) 418 ; GFX9-LABEL: name: test_smin_v3s16 419 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 420 ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 421 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 422 ; GFX9: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 423 ; GFX9: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 424 ; GFX9: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF2]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 425 ; GFX9: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 426 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 427 ; GFX9: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 428 ; GFX9: [[UV8:%[0-9]+]]:_(<2 x s16>), [[UV9:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT]](<4 x s16>) 429 ; GFX9: [[UV10:%[0-9]+]]:_(<2 x s16>), [[UV11:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT1]](<4 x s16>) 430 ; GFX9: [[SMIN:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[UV8]], [[UV10]] 431 ; GFX9: [[SMIN1:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[UV9]], [[UV11]] 432 ; GFX9: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[SMIN]](<2 x s16>) 433 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 434 ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 435 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[SMIN1]](<2 x s16>) 436 ; GFX9: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 437 ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 438 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 439 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 440 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32) 441 ; GFX9: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s32>) 442 %0:_(<3 x s16>) = G_IMPLICIT_DEF 443 %1:_(<3 x s16>) = G_IMPLICIT_DEF 444 %2:_(<3 x s16>) = G_SMIN %0, %1 445 %3:_(<3 x s32>) = G_ANYEXT %2 446 S_NOP 0, implicit %3 447... 448 449--- 450name: test_smin_v4s16 451body: | 452 bb.0: 453 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 454 455 ; SI-LABEL: name: test_smin_v4s16 456 ; SI: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 457 ; SI: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 458 ; SI: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 459 ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 460 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 461 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 462 ; SI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 463 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 464 ; SI: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) 465 ; SI: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) 466 ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 467 ; SI: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 468 ; SI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) 469 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 470 ; SI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 16 471 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST2]](s32) 472 ; SI: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 16 473 ; SI: [[SMIN:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG]], [[SEXT_INREG1]] 474 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 475 ; SI: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY4]], 16 476 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 477 ; SI: [[SEXT_INREG3:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY5]], 16 478 ; SI: [[SMIN1:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG2]], [[SEXT_INREG3]] 479 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 480 ; SI: [[SEXT_INREG4:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY6]], 16 481 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[BITCAST3]](s32) 482 ; SI: [[SEXT_INREG5:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY7]], 16 483 ; SI: [[SMIN2:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG4]], [[SEXT_INREG5]] 484 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 485 ; SI: [[SEXT_INREG6:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY8]], 16 486 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 487 ; SI: [[SEXT_INREG7:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY9]], 16 488 ; SI: [[SMIN3:%[0-9]+]]:_(s32) = G_SMIN [[SEXT_INREG6]], [[SEXT_INREG7]] 489 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 490 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[SMIN]](s32) 491 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 492 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[SMIN1]](s32) 493 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 494 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 495 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 496 ; SI: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 497 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[SMIN2]](s32) 498 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 499 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[SMIN3]](s32) 500 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C1]] 501 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C]](s32) 502 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 503 ; SI: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 504 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>) 505 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 506 ; VI-LABEL: name: test_smin_v4s16 507 ; VI: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 508 ; VI: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 509 ; VI: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 510 ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 511 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) 512 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 513 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 514 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 515 ; VI: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 516 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32) 517 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 518 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) 519 ; VI: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) 520 ; VI: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) 521 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST2]](s32) 522 ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 523 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32) 524 ; VI: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 525 ; VI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST3]](s32) 526 ; VI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) 527 ; VI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR3]](s32) 528 ; VI: [[SMIN:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC]], [[TRUNC4]] 529 ; VI: [[SMIN1:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC1]], [[TRUNC5]] 530 ; VI: [[SMIN2:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC2]], [[TRUNC6]] 531 ; VI: [[SMIN3:%[0-9]+]]:_(s16) = G_SMIN [[TRUNC3]], [[TRUNC7]] 532 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[SMIN]](s16) 533 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[SMIN1]](s16) 534 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C]](s32) 535 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL]] 536 ; VI: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 537 ; VI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[SMIN2]](s16) 538 ; VI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[SMIN3]](s16) 539 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C]](s32) 540 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL1]] 541 ; VI: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 542 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>) 543 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 544 ; GFX9-LABEL: name: test_smin_v4s16 545 ; GFX9: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 546 ; GFX9: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 547 ; GFX9: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 548 ; GFX9: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) 549 ; GFX9: [[SMIN:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[UV]], [[UV2]] 550 ; GFX9: [[SMIN1:%[0-9]+]]:_(<2 x s16>) = G_SMIN [[UV1]], [[UV3]] 551 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[SMIN]](<2 x s16>), [[SMIN1]](<2 x s16>) 552 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 553 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 554 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 555 %2:_(<4 x s16>) = G_SMIN %0, %1 556 $vgpr0_vgpr1 = COPY %2 557... 558