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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GFX6 %s
3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s
4
5define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %r) {
6; GFX6-LABEL: load_3d_v4f32_xyzw:
7; GFX6:       ; %bb.0:
8; GFX6-NEXT:    s_mov_b32 s0, s2
9; GFX6-NEXT:    s_mov_b32 s1, s3
10; GFX6-NEXT:    s_mov_b32 s2, s4
11; GFX6-NEXT:    s_mov_b32 s3, s5
12; GFX6-NEXT:    s_mov_b32 s4, s6
13; GFX6-NEXT:    s_mov_b32 s5, s7
14; GFX6-NEXT:    s_mov_b32 s6, s8
15; GFX6-NEXT:    s_mov_b32 s7, s9
16; GFX6-NEXT:    image_load v[0:3], v[0:2], s[0:7] dmask:0xf unorm
17; GFX6-NEXT:    s_waitcnt vmcnt(0)
18; GFX6-NEXT:    ; return to shader part epilog
19;
20; GFX10-LABEL: load_3d_v4f32_xyzw:
21; GFX10:       ; %bb.0:
22; GFX10-NEXT:    s_mov_b32 s0, s2
23; GFX10-NEXT:    s_mov_b32 s1, s3
24; GFX10-NEXT:    s_mov_b32 s2, s4
25; GFX10-NEXT:    s_mov_b32 s3, s5
26; GFX10-NEXT:    s_mov_b32 s4, s6
27; GFX10-NEXT:    s_mov_b32 s5, s7
28; GFX10-NEXT:    s_mov_b32 s6, s8
29; GFX10-NEXT:    s_mov_b32 s7, s9
30; GFX10-NEXT:    image_load v[0:3], v[0:2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm
31; GFX10-NEXT:    s_waitcnt vmcnt(0)
32; GFX10-NEXT:    ; return to shader part epilog
33  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 0, i32 0)
34  ret <4 x float> %v
35}
36
37define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i32 %s, i32 %t, i32 %r) {
38; GFX6-LABEL: load_3d_v4f32_xyzw_tfe:
39; GFX6:       ; %bb.0:
40; GFX6-NEXT:    s_mov_b32 s0, s2
41; GFX6-NEXT:    s_mov_b32 s1, s3
42; GFX6-NEXT:    s_mov_b32 s2, s4
43; GFX6-NEXT:    s_mov_b32 s3, s5
44; GFX6-NEXT:    s_mov_b32 s4, s6
45; GFX6-NEXT:    s_mov_b32 s5, s7
46; GFX6-NEXT:    s_mov_b32 s6, s8
47; GFX6-NEXT:    s_mov_b32 s7, s9
48; GFX6-NEXT:    image_load v[0:4], v[0:2], s[0:7] dmask:0xf unorm tfe
49; GFX6-NEXT:    s_mov_b32 s8, s10
50; GFX6-NEXT:    s_mov_b32 s9, s11
51; GFX6-NEXT:    s_mov_b32 s10, -1
52; GFX6-NEXT:    s_mov_b32 s11, 0xf000
53; GFX6-NEXT:    s_waitcnt vmcnt(0)
54; GFX6-NEXT:    buffer_store_dword v4, off, s[8:11], 0
55; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
56; GFX6-NEXT:    ; return to shader part epilog
57;
58; GFX10-LABEL: load_3d_v4f32_xyzw_tfe:
59; GFX10:       ; %bb.0:
60; GFX10-NEXT:    s_mov_b32 s0, s2
61; GFX10-NEXT:    s_mov_b32 s1, s3
62; GFX10-NEXT:    s_mov_b32 s2, s4
63; GFX10-NEXT:    s_mov_b32 s3, s5
64; GFX10-NEXT:    s_mov_b32 s4, s6
65; GFX10-NEXT:    s_mov_b32 s5, s7
66; GFX10-NEXT:    s_mov_b32 s6, s8
67; GFX10-NEXT:    s_mov_b32 s7, s9
68; GFX10-NEXT:    v_mov_b32_e32 v5, 0
69; GFX10-NEXT:    image_load v[0:4], v[0:2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm tfe
70; GFX10-NEXT:    s_waitcnt vmcnt(0)
71; GFX10-NEXT:    global_store_dword v5, v4, s[10:11]
72; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
73; GFX10-NEXT:    ; return to shader part epilog
74  %v = call { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 1, i32 0)
75  %v.vec = extractvalue { <4 x float>, i32 } %v, 0
76  %v.err = extractvalue { <4 x float>, i32 } %v, 1
77  store i32 %v.err, i32 addrspace(1)* %out, align 4
78  ret <4 x float> %v.vec
79}
80
81define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe_lwe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i32 %s, i32 %t, i32 %r) {
82; GFX6-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
83; GFX6:       ; %bb.0:
84; GFX6-NEXT:    s_mov_b32 s0, s2
85; GFX6-NEXT:    s_mov_b32 s1, s3
86; GFX6-NEXT:    s_mov_b32 s2, s4
87; GFX6-NEXT:    s_mov_b32 s3, s5
88; GFX6-NEXT:    s_mov_b32 s4, s6
89; GFX6-NEXT:    s_mov_b32 s5, s7
90; GFX6-NEXT:    s_mov_b32 s6, s8
91; GFX6-NEXT:    s_mov_b32 s7, s9
92; GFX6-NEXT:    image_load v[0:4], v[0:2], s[0:7] dmask:0xf unorm tfe lwe
93; GFX6-NEXT:    s_mov_b32 s8, s10
94; GFX6-NEXT:    s_mov_b32 s9, s11
95; GFX6-NEXT:    s_mov_b32 s10, -1
96; GFX6-NEXT:    s_mov_b32 s11, 0xf000
97; GFX6-NEXT:    s_waitcnt vmcnt(0)
98; GFX6-NEXT:    buffer_store_dword v4, off, s[8:11], 0
99; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
100; GFX6-NEXT:    ; return to shader part epilog
101;
102; GFX10-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
103; GFX10:       ; %bb.0:
104; GFX10-NEXT:    s_mov_b32 s0, s2
105; GFX10-NEXT:    s_mov_b32 s1, s3
106; GFX10-NEXT:    s_mov_b32 s2, s4
107; GFX10-NEXT:    s_mov_b32 s3, s5
108; GFX10-NEXT:    s_mov_b32 s4, s6
109; GFX10-NEXT:    s_mov_b32 s5, s7
110; GFX10-NEXT:    s_mov_b32 s6, s8
111; GFX10-NEXT:    s_mov_b32 s7, s9
112; GFX10-NEXT:    v_mov_b32_e32 v5, 0
113; GFX10-NEXT:    image_load v[0:4], v[0:2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm tfe lwe
114; GFX10-NEXT:    s_waitcnt vmcnt(0)
115; GFX10-NEXT:    global_store_dword v5, v4, s[10:11]
116; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
117; GFX10-NEXT:    ; return to shader part epilog
118  %v = call { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 3, i32 0)
119  %v.vec = extractvalue { <4 x float>, i32 } %v, 0
120  %v.err = extractvalue { <4 x float>, i32 } %v, 1
121  store i32 %v.err, i32 addrspace(1)* %out, align 4
122  ret <4 x float> %v.vec
123}
124
125declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i32(i32 immarg, i32, i32, i32, <8 x i32>, i32 immarg, i32 immarg) #0
126declare { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i32(i32 immarg, i32, i32, i32, <8 x i32>, i32 immarg, i32 immarg) #0
127
128attributes #0 = { nounwind readonly }
129