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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
4
5---
6name: ds_gws_init_s_s
7legalized: true
8tracksRegLiveness: true
9
10body: |
11  bb.0:
12    liveins: $sgpr0, $sgpr1
13    ; CHECK-LABEL: name: ds_gws_init_s_s
14    ; CHECK: liveins: $sgpr0, $sgpr1
15    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
16    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
17    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
18    ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.init), [[COPY2]](s32), [[COPY1]](s32)
19    %0:_(s32) = COPY $sgpr0
20    %1:_(s32) = COPY $sgpr1
21    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.init), %0, %1
22...
23
24---
25name: ds_gws_init_s_v
26legalized: true
27tracksRegLiveness: true
28
29body: |
30  bb.0:
31    liveins: $sgpr0, $vgpr0
32    ; CHECK-LABEL: name: ds_gws_init_s_v
33    ; CHECK: liveins: $sgpr0, $vgpr0
34    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
35    ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
36    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
37    ; CHECK: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32(s32) = V_READFIRSTLANE_B32 [[COPY1]](s32), implicit $exec
38    ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.init), [[COPY2]](s32), [[V_READFIRSTLANE_B32_]](s32)
39    %0:_(s32) = COPY $sgpr0
40    %1:_(s32) = COPY $vgpr0
41    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.init), %0, %1
42...
43
44---
45name: ds_gws_init_v_s
46legalized: true
47tracksRegLiveness: true
48
49body: |
50  bb.0:
51    liveins: $vgpr0, $sgpr0
52    ; CHECK-LABEL: name: ds_gws_init_v_s
53    ; CHECK: liveins: $vgpr0, $sgpr0
54    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
55    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
56    ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.init), [[COPY]](s32), [[COPY1]](s32)
57    %0:_(s32) = COPY $vgpr0
58    %1:_(s32) = COPY $sgpr0
59    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.init), %0, %1
60...
61
62---
63name: ds_gws_init_v_v
64legalized: true
65tracksRegLiveness: true
66
67body: |
68  bb.0:
69    liveins: $vgpr0, $vgpr1
70    ; CHECK-LABEL: name: ds_gws_init_v_v
71    ; CHECK: liveins: $vgpr0, $vgpr1
72    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
73    ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1
74    ; CHECK: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32(s32) = V_READFIRSTLANE_B32 [[COPY1]](s32), implicit $exec
75    ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.init), [[COPY]](s32), [[V_READFIRSTLANE_B32_]](s32)
76    %0:_(s32) = COPY $vgpr0
77    %1:_(s32) = COPY $vgpr1
78    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.init), %0, %1
79...
80