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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
4
5---
6name: build_vector_trunc_v2s16_s32_ss
7legalized: true
8
9body: |
10  bb.0:
11    liveins: $sgpr0, $sgpr1
12
13    ; CHECK-LABEL: name: build_vector_trunc_v2s16_s32_ss
14    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
15    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
16    ; CHECK: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY]](s32), [[COPY1]](s32)
17    %0:_(s32) = COPY $sgpr0
18    %1:_(s32) = COPY $sgpr1
19    %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1
20...
21
22---
23name: build_vector_trunc_v2s16_s32_sv
24legalized: true
25
26body: |
27  bb.0:
28    liveins: $sgpr0, $vgpr0
29
30    ; CHECK-LABEL: name: build_vector_trunc_v2s16_s32_sv
31    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
32    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
33    ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 65535
34    ; CHECK: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 16
35    ; CHECK: [[SHL:%[0-9]+]]:vgpr(s32) = G_SHL [[COPY1]], [[C1]](s32)
36    ; CHECK: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[COPY]], [[C]]
37    ; CHECK: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[SHL]]
38    ; CHECK: [[BITCAST:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
39    %0:_(s32) = COPY $sgpr0
40    %1:_(s32) = COPY $vgpr0
41    %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1
42...
43
44---
45name: build_vector_trunc_v2s16_s32_vs
46legalized: true
47
48body: |
49  bb.0:
50    liveins: $vgpr0, $sgpr0
51
52    ; CHECK-LABEL: name: build_vector_trunc_v2s16_s32_vs
53    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
54    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
55    ; CHECK: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 65535
56    ; CHECK: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 16
57    ; CHECK: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY1]], [[C1]](s32)
58    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[C]]
59    ; CHECK: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[SHL]]
60    ; CHECK: [[BITCAST:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
61    %0:_(s32) = COPY $vgpr0
62    %1:_(s32) = COPY $sgpr0
63    %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1
64...
65
66---
67name: build_vector_trunc_v2s16_s32_vv
68legalized: true
69
70body: |
71  bb.0:
72    liveins: $vgpr0, $vgpr1
73
74    ; CHECK-LABEL: name: build_vector_trunc_v2s16_s32_vv
75    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
76    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
77    ; CHECK: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 65535
78    ; CHECK: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 16
79    ; CHECK: [[SHL:%[0-9]+]]:vgpr(s32) = G_SHL [[COPY1]], [[C1]](s32)
80    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[C]]
81    ; CHECK: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[SHL]]
82    ; CHECK: [[BITCAST:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
83    %0:_(s32) = COPY $vgpr0
84    %1:_(s32) = COPY $vgpr1
85    %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1
86...
87