1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s 3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s 4 5--- 6name: fceil_s 7legalized: true 8 9body: | 10 bb.0: 11 liveins: $sgpr0 12 ; CHECK-LABEL: name: fceil_s 13 ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 14 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32) 15 ; CHECK: [[FCEIL:%[0-9]+]]:vgpr(s32) = G_FCEIL [[COPY1]] 16 %0:_(s32) = COPY $sgpr0 17 %1:_(s32) = G_FCEIL %0 18... 19 20--- 21name: fceil_v 22legalized: true 23 24body: | 25 bb.0: 26 liveins: $vgpr0 27 ; CHECK-LABEL: name: fceil_v 28 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 29 ; CHECK: [[FCEIL:%[0-9]+]]:vgpr(s32) = G_FCEIL [[COPY]] 30 %0:_(s32) = COPY $vgpr0 31 %1:_(s32) = G_FCEIL %0 32... 33