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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
4
5---
6name: fmul_ss
7legalized: true
8
9body: |
10  bb.0:
11    liveins: $sgpr0, $sgpr1
12    ; CHECK-LABEL: name: fmul_ss
13    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
14    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
15    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
16    ; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
17    ; CHECK: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY2]], [[COPY3]]
18    %0:_(s32) = COPY $sgpr0
19    %1:_(s32) = COPY $sgpr1
20    %2:_(s32) = G_FMUL %0, %1
21...
22
23---
24name: fmul_sv
25legalized: true
26
27body: |
28  bb.0:
29    liveins: $sgpr0, $vgpr0
30    ; CHECK-LABEL: name: fmul_sv
31    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
32    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
33    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
34    ; CHECK: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY2]], [[COPY1]]
35    %0:_(s32) = COPY $sgpr0
36    %1:_(s32) = COPY $vgpr0
37    %2:_(s32) = G_FMUL %0, %1
38...
39
40---
41name: fmul_vs
42legalized: true
43
44body: |
45  bb.0:
46    liveins: $sgpr0, $vgpr0
47    ; CHECK-LABEL: name: fmul_vs
48    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
49    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
50    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
51    ; CHECK: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY]], [[COPY2]]
52    %0:_(s32) = COPY $vgpr0
53    %1:_(s32) = COPY $sgpr0
54    %2:_(s32) = G_FMUL %0, %1
55...
56
57---
58name: fmul_vv
59legalized: true
60
61body: |
62  bb.0:
63    liveins: $vgpr0, $vgpr1
64    ; CHECK-LABEL: name: fmul_vv
65    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
66    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
67    ; CHECK: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY]], [[COPY1]]
68    %0:_(s32) = COPY $vgpr0
69    %1:_(s32) = COPY $vgpr1
70    %2:_(s32) = G_FMUL %0, %1
71...
72