1; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s 2; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s 3 4 5; GCN-LABEL: {{^}}add_var_var_i1: 6; GFX9: s_xor_b64 7; GFX10: s_xor_b32 8define amdgpu_kernel void @add_var_var_i1(i1 addrspace(1)* %out, i1 addrspace(1)* %in0, i1 addrspace(1)* %in1) { 9 %a = load volatile i1, i1 addrspace(1)* %in0 10 %b = load volatile i1, i1 addrspace(1)* %in1 11 %add = add i1 %a, %b 12 store i1 %add, i1 addrspace(1)* %out 13 ret void 14} 15 16; GCN-LABEL: {{^}}add_var_imm_i1: 17; GFX9: s_not_b64 18; GFX10: s_not_b32 19define amdgpu_kernel void @add_var_imm_i1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) { 20 %a = load volatile i1, i1 addrspace(1)* %in 21 %add = add i1 %a, 1 22 store i1 %add, i1 addrspace(1)* %out 23 ret void 24} 25 26; GCN-LABEL: {{^}}add_i1_cf: 27; GCN: ; %endif 28; GFX9: s_not_b64 29; GFX10: s_not_b32 30define amdgpu_kernel void @add_i1_cf(i1 addrspace(1)* %out, i1 addrspace(1)* %a, i1 addrspace(1)* %b) { 31entry: 32 %tid = call i32 @llvm.amdgcn.workitem.id.x() 33 %d_cmp = icmp ult i32 %tid, 16 34 br i1 %d_cmp, label %if, label %else 35 36if: 37 %0 = load volatile i1, i1 addrspace(1)* %a 38 br label %endif 39 40else: 41 %1 = load volatile i1, i1 addrspace(1)* %b 42 br label %endif 43 44endif: 45 %2 = phi i1 [%0, %if], [%1, %else] 46 %3 = add i1 %2, -1 47 store i1 %3, i1 addrspace(1)* %out 48 ret void 49} 50 51declare i32 @llvm.amdgcn.workitem.id.x() 52