1; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s 2 3; CHECK-LABEL: {{^}}main: 4; CHECK: LOOP_START_DX10 5; CHECK: ALU_PUSH_BEFORE 6; CHECK: LOOP_START_DX10 7; CHECK: PUSH 8; CHECK-NOT: ALU_PUSH_BEFORE 9; CHECK: END_LOOP 10; CHECK: END_LOOP 11define amdgpu_ps void @main (<4 x float> inreg %reg0) { 12entry: 13 br label %outer_loop 14 15outer_loop: 16 %cnt = phi i32 [0, %entry], [%cnt_incr, %inner_loop] 17 %cond = icmp eq i32 %cnt, 16 18 br i1 %cond, label %outer_loop_body, label %exit 19 20outer_loop_body: 21 %cnt_incr = add i32 %cnt, 1 22 br label %inner_loop 23 24inner_loop: 25 %cnt2 = phi i32 [0, %outer_loop_body], [%cnt2_incr, %inner_loop_body] 26 %n = load volatile i32, i32 addrspace(1)* undef 27 %cond2 = icmp slt i32 %cnt2, %n 28 br i1 %cond2, label %inner_loop_body, label %outer_loop 29 30inner_loop_body: 31 %cnt2_incr = add i32 %cnt2, 1 32 br label %inner_loop 33 34exit: 35 ret void 36} 37