1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx908 -verify-machineinstrs -run-pass peephole-opt -o - %s | FileCheck -check-prefix=GCN %s 3 4--- 5name: fold_simm_16_sub_to_lo 6body: | 7 bb.0: 8 9 ; GCN-LABEL: name: fold_simm_16_sub_to_lo 10 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2048 11 ; GCN: [[COPY:%[0-9]+]]:sgpr_lo16 = COPY killed [[S_MOV_B32_]].lo16 12 ; GCN: SI_RETURN_TO_EPILOG [[COPY]] 13 %0:sreg_32 = S_MOV_B32 2048 14 %1:sgpr_lo16 = COPY killed %0.lo16 15 SI_RETURN_TO_EPILOG %1 16 17... 18 19--- 20name: fold_simm_16_sub_to_phys 21body: | 22 bb.0: 23 24 ; GCN-LABEL: name: fold_simm_16_sub_to_phys 25 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2048 26 ; GCN: $sgpr0 = S_MOV_B32 2048 27 ; GCN: SI_RETURN_TO_EPILOG $sgpr0_lo16 28 %0:sreg_32 = S_MOV_B32 2048 29 $sgpr0_lo16 = COPY killed %0.lo16 30 SI_RETURN_TO_EPILOG $sgpr0_lo16 31 32... 33 34--- 35name: fold_aimm_16_sub_to_phys 36body: | 37 bb.0: 38 39 ; GCN-LABEL: name: fold_aimm_16_sub_to_phys 40 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 41 ; GCN: $agpr0 = V_ACCVGPR_WRITE_B32 0, implicit $exec 42 ; GCN: SI_RETURN_TO_EPILOG $agpr0_lo16 43 %0:sreg_32 = S_MOV_B32 0 44 $agpr0_lo16 = COPY killed %0.lo16 45 SI_RETURN_TO_EPILOG $agpr0_lo16 46 47... 48 49--- 50name: fold_vimm_16_sub_to_lo 51body: | 52 bb.0: 53 54 ; GCN-LABEL: name: fold_vimm_16_sub_to_lo 55 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2048 56 ; GCN: [[COPY:%[0-9]+]]:vgpr_lo16 = COPY killed [[S_MOV_B32_]].lo16 57 ; GCN: SI_RETURN_TO_EPILOG [[COPY]] 58 %0:sreg_32 = S_MOV_B32 2048 59 %1:vgpr_lo16 = COPY killed %0.lo16 60 SI_RETURN_TO_EPILOG %1 61 62... 63 64--- 65name: fold_vimm_16_sub_to_phys 66body: | 67 bb.0: 68 69 ; GCN-LABEL: name: fold_vimm_16_sub_to_phys 70 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2048 71 ; GCN: $vgpr0_lo16 = COPY killed [[S_MOV_B32_]].lo16 72 ; GCN: SI_RETURN_TO_EPILOG $vgpr0_lo16 73 %0:sreg_32 = S_MOV_B32 2048 74 $vgpr0_lo16 = COPY killed %0.lo16 75 SI_RETURN_TO_EPILOG $vgpr0_lo16 76 77... 78