1; RUN: llc < %s -march=r600 -mcpu=redwood -verify-machineinstrs | FileCheck %s 2 3; The test is for a bug in R600EmitClauseMarkers.cpp where this pass 4; was searching for a use of the OQAP register in order to determine 5; if an LDS instruction could fit in the current clause, but never finding 6; one. This created an infinite loop and hung the compiler. 7; 8; The LDS instruction should not have been defining OQAP in the first place, 9; because the LDS instructions are pseudo instructions and the OQAP 10; reads and writes are bundled together in the same instruction. 11 12; CHECK: {{^}}lds_crash: 13define amdgpu_kernel void @lds_crash(i32 addrspace(1)* %out, i32 addrspace(3)* %in, i32 %a, i32 %b, i32 %c) { 14entry: 15 %0 = load i32, i32 addrspace(3)* %in 16 ; This block needs to be > 115 ISA instructions to hit the bug, 17 ; so we'll use udiv instructions. 18 %div0 = udiv i32 %0, %b 19 %div1 = udiv i32 %div0, %a 20 %div2 = udiv i32 %div1, 11 21 %div3 = udiv i32 %div2, %a 22 %div4 = udiv i32 %div3, %b 23 %div5 = udiv i32 %div4, %c 24 %div6 = udiv i32 %div5, %div0 25 %div7 = udiv i32 %div6, %div1 26 store i32 %div7, i32 addrspace(1)* %out 27 ret void 28} 29