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1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s
3
4; GCN-LABEL: {{^}}is_local_vgpr:
5; GCN-DAG: {{flat|global}}_load_dwordx2 v{{\[[0-9]+}}:[[PTR_HI:[0-9]+]]{{\]}}
6; CI-DAG: s_load_dword [[APERTURE:s[0-9]+]], s[4:5], 0x10
7; GFX9-DAG: s_getreg_b32 [[APERTURE:s[0-9]+]], hwreg(HW_REG_SH_MEM_BASES, 16, 16)
8; GFX9: s_lshl_b32 [[APERTURE]], [[APERTURE]], 16
9
10; GCN: v_cmp_eq_u32_e32 vcc, [[APERTURE]], v[[PTR_HI]]
11; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 1, vcc
12define amdgpu_kernel void @is_local_vgpr(i8* addrspace(1)* %ptr.ptr) {
13  %id = call i32 @llvm.amdgcn.workitem.id.x()
14  %gep = getelementptr inbounds i8*, i8* addrspace(1)* %ptr.ptr, i32 %id
15  %ptr = load volatile i8*, i8* addrspace(1)* %gep
16  %val = call i1 @llvm.amdgcn.is.shared(i8* %ptr)
17  %ext = zext i1 %val to i32
18  store i32 %ext, i32 addrspace(1)* undef
19  ret void
20}
21
22; FIXME: setcc (zero_extend (setcc)), 1) not folded out, resulting in
23; select and vcc branch.
24
25; GCN-LABEL: {{^}}is_local_sgpr:
26; CI-DAG: s_load_dword [[APERTURE:s[0-9]+]], s[4:5], 0x10{{$}}
27; GFX9-DAG: s_getreg_b32 [[APERTURE:s[0-9]+]], hwreg(HW_REG_SH_MEM_BASES, 16, 16)
28; GFX9-DAG: s_lshl_b32 [[APERTURE]], [[APERTURE]], 16
29
30; CI-DAG: s_load_dword [[PTR_HI:s[0-9]+]], s[6:7], 0x1{{$}}
31; GFX9-DAG: s_load_dword [[PTR_HI:s[0-9]+]], s[6:7], 0x4{{$}}
32
33; GCN: v_mov_b32_e32 [[V_APERTURE:v[0-9]+]], [[APERTURE]]
34; GCN: v_cmp_eq_u32_e32 vcc, [[PTR_HI]], [[V_APERTURE]]
35; GCN: s_cbranch_vccnz
36define amdgpu_kernel void @is_local_sgpr(i8* %ptr) {
37  %val = call i1 @llvm.amdgcn.is.shared(i8* %ptr)
38  br i1 %val, label %bb0, label %bb1
39
40bb0:
41  store volatile i32 0, i32 addrspace(1)* undef
42  br label %bb1
43
44bb1:
45  ret void
46}
47
48declare i32 @llvm.amdgcn.workitem.id.x() #0
49declare i1 @llvm.amdgcn.is.shared(i8* nocapture) #0
50
51attributes #0 = { nounwind readnone speculatable }
52