1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefix=GCN %s 3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefix=GCN %s 4; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefix=GCN %s 5; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefix=GCN %s 6 7define float @v_sqrt_f32(float %src) { 8; GCN-LABEL: v_sqrt_f32: 9; GCN: ; %bb.0: 10; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 11; GCN-NEXT: v_sqrt_f32_e32 v0, v0 12; GCN-NEXT: s_setpc_b64 s[30:31] 13 %sqrt = call float @llvm.amdgcn.sqrt.f32(float %src) 14 ret float %sqrt 15} 16 17define float @v_fabs_sqrt_f32(float %src) { 18; GCN-LABEL: v_fabs_sqrt_f32: 19; GCN: ; %bb.0: 20; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 21; GCN-NEXT: v_sqrt_f32_e64 v0, |v0| 22; GCN-NEXT: s_setpc_b64 s[30:31] 23 %fabs.src = call float @llvm.fabs.f32(float %src) 24 %sqrt = call float @llvm.amdgcn.sqrt.f32(float %fabs.src) 25 ret float %sqrt 26} 27 28define float @v_fneg_fabs_sqrt_f32(float %src) { 29; GCN-LABEL: v_fneg_fabs_sqrt_f32: 30; GCN: ; %bb.0: 31; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 32; GCN-NEXT: v_sqrt_f32_e64 v0, -|v0| 33; GCN-NEXT: s_setpc_b64 s[30:31] 34 %fabs.src = call float @llvm.fabs.f32(float %src) 35 %neg.fabs.src = fneg float %fabs.src 36 %sqrt = call float @llvm.amdgcn.sqrt.f32(float %neg.fabs.src) 37 ret float %sqrt 38} 39 40define double @v_sqrt_f64(double %src) { 41; GCN-LABEL: v_sqrt_f64: 42; GCN: ; %bb.0: 43; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 44; GCN-NEXT: v_sqrt_f64_e32 v[0:1], v[0:1] 45; GCN-NEXT: s_setpc_b64 s[30:31] 46 %sqrt = call double @llvm.amdgcn.sqrt.f64(double %src) 47 ret double %sqrt 48} 49 50define double @v_fabs_sqrt_f64(double %src) { 51; GCN-LABEL: v_fabs_sqrt_f64: 52; GCN: ; %bb.0: 53; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 54; GCN-NEXT: v_sqrt_f64_e64 v[0:1], |v[0:1]| 55; GCN-NEXT: s_setpc_b64 s[30:31] 56 %fabs.src = call double @llvm.fabs.f64(double %src) 57 %sqrt = call double @llvm.amdgcn.sqrt.f64(double %fabs.src) 58 ret double %sqrt 59} 60 61define double @v_fneg_fabs_sqrt_f64(double %src) { 62; GCN-LABEL: v_fneg_fabs_sqrt_f64: 63; GCN: ; %bb.0: 64; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 65; GCN-NEXT: v_sqrt_f64_e64 v[0:1], -|v[0:1]| 66; GCN-NEXT: s_setpc_b64 s[30:31] 67 %fabs.src = call double @llvm.fabs.f64(double %src) 68 %neg.fabs.src = fneg double %fabs.src 69 %sqrt = call double @llvm.amdgcn.sqrt.f64(double %neg.fabs.src) 70 ret double %sqrt 71} 72 73declare float @llvm.amdgcn.sqrt.f32(float) #0 74declare double @llvm.amdgcn.sqrt.f64(double) #0 75declare float @llvm.fabs.f32(float) #0 76declare double @llvm.fabs.f64(double) #0 77 78attributes #0 = { nounwind readnone speculatable willreturn } 79