1; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s 2; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s 3 4@local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4 5 6; GCN-LABEL: {{^}}local_memory: 7 8; GCN-NOT: s_wqm_b64 9; GCN: ds_write_b32 10 11; GCN: s_barrier 12 13; GCN: ds_read_b32 {{v[0-9]+}}, 14define amdgpu_kernel void @local_memory(i32 addrspace(1)* %out) #0 { 15entry: 16 %y.i = call i32 @llvm.amdgcn.workitem.id.x() #1 17 %arrayidx = getelementptr inbounds [128 x i32], [128 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %y.i 18 store i32 %y.i, i32 addrspace(3)* %arrayidx, align 4 19 %add = add nsw i32 %y.i, 1 20 %cmp = icmp eq i32 %add, 16 21 %.add = select i1 %cmp, i32 0, i32 %add 22 call void @llvm.amdgcn.s.barrier() 23 %arrayidx1 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %.add 24 %tmp = load i32, i32 addrspace(3)* %arrayidx1, align 4 25 %arrayidx2 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %y.i 26 store i32 %tmp, i32 addrspace(1)* %arrayidx2, align 4 27 ret void 28} 29 30@local_memory_two_objects.local_mem0 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4 31@local_memory_two_objects.local_mem1 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4 32 33; Check that the LDS size emitted correctly 34; EG: .long 166120 35; EG-NEXT: .long 8 36; GCN: .long 47180 37; GCN-NEXT: .long 32900 38 39; GCN-LABEL: {{^}}local_memory_two_objects: 40; GCN: v_lshlrev_b32_e32 [[ADDRW:v[0-9]+]], 2, v0 41; CI-DAG: v_sub_i32_e32 [[SUB:v[0-9]+]], vcc, 0, [[ADDRW]] 42; CI-DAG: ds_write2_b32 [[ADDRW]], {{v[0-9]+}}, {{v[0-9]+}} offset1:4 43; SI-DAG: ds_write2_b32 [[ADDRW]], {{v[0-9]+}}, {{v[0-9]+}} offset1:4 44; SI-DAG: v_sub_i32_e32 [[SUB0:v[0-9]+]], vcc, 28, [[ADDRW]] 45 46; GCN: s_barrier 47 48; SI-DAG: v_sub_i32_e32 [[SUB1:v[0-9]+]], vcc, 12, [[ADDRW]] 49; SI-DAG: ds_read_b32 v{{[0-9]+}}, [[SUB0]] 50; SI-DAG: ds_read_b32 v{{[0-9]+}}, [[SUB1]] 51; CI: ds_read2_b32 {{v\[[0-9]+:[0-9]+\]}}, [[SUB]] offset0:3 offset1:7 52 53define amdgpu_kernel void @local_memory_two_objects(i32 addrspace(1)* %out) #0 { 54entry: 55 %x.i = call i32 @llvm.amdgcn.workitem.id.x() 56 %arrayidx = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %x.i 57 store i32 %x.i, i32 addrspace(3)* %arrayidx, align 4 58 %mul = shl nsw i32 %x.i, 1 59 %arrayidx1 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %x.i 60 store i32 %mul, i32 addrspace(3)* %arrayidx1, align 4 61 %sub = sub nsw i32 3, %x.i 62 call void @llvm.amdgcn.s.barrier() 63 %arrayidx2 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %sub 64 %tmp = load i32, i32 addrspace(3)* %arrayidx2, align 4 65 %arrayidx3 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %x.i 66 store i32 %tmp, i32 addrspace(1)* %arrayidx3, align 4 67 %arrayidx4 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %sub 68 %tmp1 = load i32, i32 addrspace(3)* %arrayidx4, align 4 69 %add = add nsw i32 %x.i, 4 70 %arrayidx5 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %add 71 store i32 %tmp1, i32 addrspace(1)* %arrayidx5, align 4 72 ret void 73} 74 75declare i32 @llvm.amdgcn.workitem.id.x() #1 76declare void @llvm.amdgcn.s.barrier() #2 77 78attributes #0 = { nounwind } 79attributes #1 = { nounwind readnone } 80attributes #2 = { convergent nounwind } 81