1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3; GCN-LABEL: {{^}}negated_cond: 4; GCN: BB0_1: 5; GCN: v_cmp_eq_u32_e64 [[CC:[^,]+]], 6; GCN: BB0_3: 7; GCN-NOT: v_cndmask_b32 8; GCN-NOT: v_cmp 9; GCN: s_andn2_b64 vcc, exec, [[CC]] 10; GCN: s_cbranch_vccnz BB0_2 11define amdgpu_kernel void @negated_cond(i32 addrspace(1)* %arg1) { 12bb: 13 br label %bb1 14 15bb1: 16 %tmp1 = load i32, i32 addrspace(1)* %arg1 17 %tmp2 = icmp eq i32 %tmp1, 0 18 br label %bb2 19 20bb2: 21 %tmp3 = phi i32 [ 0, %bb1 ], [ %tmp6, %bb4 ] 22 %tmp4 = shl i32 %tmp3, 5 23 br i1 %tmp2, label %bb3, label %bb4 24 25bb3: 26 %tmp5 = add i32 %tmp4, 1 27 br label %bb4 28 29bb4: 30 %tmp6 = phi i32 [ %tmp5, %bb3 ], [ %tmp4, %bb2 ] 31 %gep = getelementptr inbounds i32, i32 addrspace(1)* %arg1, i32 %tmp6 32 store i32 0, i32 addrspace(1)* %gep 33 %tmp7 = icmp eq i32 %tmp6, 32 34 br i1 %tmp7, label %bb1, label %bb2 35} 36 37; GCN-LABEL: {{^}}negated_cond_dominated_blocks: 38; GCN: v_cmp_ne_u32_e64 [[CC1:[^,]+]], 39; GCN: s_branch [[BB1:BB[0-9]+_[0-9]+]] 40; GCN: [[BB0:BB[0-9]+_[0-9]+]] 41; GCN-NOT: v_cndmask_b32 42; GCN-NOT: v_cmp 43; GCN: [[BB1]]: 44; GCN: s_mov_b64 [[CC2:[^,]+]], -1 45; GCN: s_mov_b64 vcc, [[CC1]] 46; GCN: s_cbranch_vccz [[BB2:BB[0-9]+_[0-9]+]] 47; GCN: s_mov_b64 [[CC2]], 0 48; GCN: [[BB2]]: 49; GCN: s_andn2_b64 vcc, exec, [[CC2]] 50; GCN: s_cbranch_vccnz [[BB0]] 51define amdgpu_kernel void @negated_cond_dominated_blocks(i32 addrspace(1)* %arg1) { 52bb: 53 br label %bb2 54 55bb2: 56 %tmp1 = load i32, i32 addrspace(1)* %arg1 57 %tmp2 = icmp eq i32 %tmp1, 0 58 br label %bb4 59 60bb3: 61 ret void 62 63bb4: 64 %tmp3 = phi i32 [ 0, %bb2 ], [ %tmp7, %bb7 ] 65 %tmp4 = shl i32 %tmp3, 5 66 br i1 %tmp2, label %bb5, label %bb6 67 68bb5: 69 %tmp5 = add i32 %tmp4, 1 70 br label %bb7 71 72bb6: 73 %tmp6 = add i32 %tmp3, 1 74 br label %bb7 75 76bb7: 77 %tmp7 = phi i32 [ %tmp5, %bb5 ], [ %tmp6, %bb6 ] 78 %gep = getelementptr inbounds i32, i32 addrspace(1)* %arg1, i32 %tmp7 79 store i32 0, i32 addrspace(1)* %gep 80 %tmp8 = icmp eq i32 %tmp7, 32 81 br i1 %tmp8, label %bb3, label %bb4 82} 83