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1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -enable-var-scope %s
2
3declare i32 @llvm.read_register.i32(metadata) #0
4declare i64 @llvm.read_register.i64(metadata) #0
5
6; CHECK-LABEL: {{^}}test_read_m0:
7; CHECK: s_mov_b32 m0, -1
8; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], m0
9; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
10define amdgpu_kernel void @test_read_m0(i32 addrspace(1)* %out) #0 {
11  store volatile i32 0, i32 addrspace(3)* undef
12  %m0 = call i32 @llvm.read_register.i32(metadata !0)
13  store i32 %m0, i32 addrspace(1)* %out
14  ret void
15}
16
17; CHECK-LABEL: {{^}}test_read_exec:
18; CHECK: v_mov_b32_e32 v[[LO:[0-9]+]], exec_lo
19; CHECK: v_mov_b32_e32 v[[HI:[0-9]+]], exec_hi
20; CHECK: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
21define amdgpu_kernel void @test_read_exec(i64 addrspace(1)* %out) #0 {
22  %exec = call i64 @llvm.read_register.i64(metadata !1)
23  store i64 %exec, i64 addrspace(1)* %out
24  ret void
25}
26
27; CHECK-LABEL: {{^}}test_read_flat_scratch:
28; CHECK: v_mov_b32_e32 v[[LO:[0-9]+]], flat_scratch_lo
29; CHECK: v_mov_b32_e32 v[[HI:[0-9]+]], flat_scratch_hi
30; CHECK: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
31define amdgpu_kernel void @test_read_flat_scratch(i64 addrspace(1)* %out) #0 {
32  %flat_scratch = call i64 @llvm.read_register.i64(metadata !2)
33  store i64 %flat_scratch, i64 addrspace(1)* %out
34  ret void
35}
36
37; CHECK-LABEL: {{^}}test_read_flat_scratch_lo:
38; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], flat_scratch_lo
39; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
40define amdgpu_kernel void @test_read_flat_scratch_lo(i32 addrspace(1)* %out) #0 {
41  %flat_scratch_lo = call i32 @llvm.read_register.i32(metadata !3)
42  store i32 %flat_scratch_lo, i32 addrspace(1)* %out
43  ret void
44}
45
46; CHECK-LABEL: {{^}}test_read_flat_scratch_hi:
47; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], flat_scratch_hi
48; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
49define amdgpu_kernel void @test_read_flat_scratch_hi(i32 addrspace(1)* %out) #0 {
50  %flat_scratch_hi = call i32 @llvm.read_register.i32(metadata !4)
51  store i32 %flat_scratch_hi, i32 addrspace(1)* %out
52  ret void
53}
54
55; CHECK-LABEL: {{^}}test_read_exec_lo:
56; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], exec_lo
57; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
58define amdgpu_kernel void @test_read_exec_lo(i32 addrspace(1)* %out) #0 {
59  %exec_lo = call i32 @llvm.read_register.i32(metadata !5)
60  store i32 %exec_lo, i32 addrspace(1)* %out
61  ret void
62}
63
64; CHECK-LABEL: {{^}}test_read_exec_hi:
65; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], exec_hi
66; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]]
67define amdgpu_kernel void @test_read_exec_hi(i32 addrspace(1)* %out) #0 {
68  %exec_hi = call i32 @llvm.read_register.i32(metadata !6)
69  store i32 %exec_hi, i32 addrspace(1)* %out
70  ret void
71}
72
73attributes #0 = { nounwind }
74
75!0 = !{!"m0"}
76!1 = !{!"exec"}
77!2 = !{!"flat_scratch"}
78!3 = !{!"flat_scratch_lo"}
79!4 = !{!"flat_scratch_hi"}
80!5 = !{!"exec_lo"}
81!6 = !{!"exec_hi"}
82