1# RUN: llc -march=amdgcn -mcpu=fiji -run-pass si-insert-waitcnts %s -o - | FileCheck %s 2 3--- | 4 define amdgpu_kernel void @basic_insert_dcache_wb() { 5 ret void 6 } 7 8 define amdgpu_kernel void @explicit_flush_after() { 9 ret void 10 } 11 12 define amdgpu_kernel void @explicit_flush_before() { 13 ret void 14 } 15 16 define amdgpu_kernel void @no_scalar_store() { 17 ret void 18 } 19 20 define amdgpu_kernel void @multi_block_store() { 21 bb0: 22 br i1 undef, label %bb1, label %bb2 23 24 bb1: 25 ret void 26 27 bb2: 28 ret void 29 } 30 31 define amdgpu_kernel void @one_block_store() { 32 bb0: 33 br i1 undef, label %bb1, label %bb2 34 35 bb1: 36 ret void 37 38 bb2: 39 ret void 40 } 41 42 define amdgpu_ps float @si_return() { 43 ret float undef 44 } 45 46... 47--- 48# CHECK-LABEL: name: basic_insert_dcache_wb 49# CHECK: bb.0: 50# CHECK-NEXT: S_STORE_DWORD 51# CHECK-NEXT: S_DCACHE_WB 52# CHECK-NEXT: S_ENDPGM 0 53 54name: basic_insert_dcache_wb 55tracksRegLiveness: false 56machineFunctionInfo: 57 isEntryFunction: true 58 59body: | 60 bb.0: 61 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0, 0 62 S_ENDPGM 0 63... 64--- 65# Already has an explicitly requested flush after the last store. 66# CHECK-LABEL: name: explicit_flush_after 67# CHECK: bb.0: 68# CHECK-NEXT: S_STORE_DWORD 69# CHECK-NEXT: S_DCACHE_WB 70# CHECK-NEXT: S_ENDPGM 0 71 72name: explicit_flush_after 73tracksRegLiveness: false 74machineFunctionInfo: 75 isEntryFunction: true 76 77body: | 78 bb.0: 79 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0, 0 80 S_DCACHE_WB 81 S_ENDPGM 0 82... 83--- 84# Already has an explicitly requested flush before the last store. 85# CHECK-LABEL: name: explicit_flush_before 86# CHECK: bb.0: 87# CHECK-NEXT: S_DCACHE_WB 88# CHECK-NEXT: S_STORE_DWORD 89# CHECK-NEXT: S_DCACHE_WB 90# CHECK-NEXT: S_ENDPGM 0 91 92name: explicit_flush_before 93tracksRegLiveness: false 94machineFunctionInfo: 95 isEntryFunction: true 96 97body: | 98 bb.0: 99 S_DCACHE_WB 100 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0, 0 101 S_ENDPGM 0 102... 103--- 104# CHECK-LABEL: no_scalar_store 105# CHECK: bb.0 106# CHECK-NEXT: S_ENDPGM 0 107name: no_scalar_store 108tracksRegLiveness: false 109machineFunctionInfo: 110 isEntryFunction: true 111 112body: | 113 bb.0: 114 S_ENDPGM 0 115... 116 117# CHECK-LABEL: name: multi_block_store 118# CHECK: bb.0: 119# CHECK-NEXT: S_STORE_DWORD 120# CHECK-NEXT: S_DCACHE_WB 121# CHECK-NEXT: S_ENDPGM 0 122 123# CHECK: bb.1: 124# CHECK-NEXT: S_STORE_DWORD 125# CHECK-NEXT: S_DCACHE_WB 126# CHECK-NEXT: S_ENDPGM 0 127 128name: multi_block_store 129tracksRegLiveness: false 130machineFunctionInfo: 131 isEntryFunction: true 132 133body: | 134 bb.0: 135 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0, 0 136 S_ENDPGM 0 137 138 bb.1: 139 S_STORE_DWORD_SGPR undef $sgpr4, undef $sgpr6_sgpr7, undef $m0, 0, 0 140 S_ENDPGM 0 141... 142... 143 144# This one should be able to omit the flush in the storeless block but 145# this isn't handled now. 146 147# CHECK-LABEL: name: one_block_store 148# CHECK: bb.0: 149# CHECK-NEXT: S_DCACHE_WB 150# CHECK-NEXT: S_ENDPGM 0 151 152# CHECK: bb.1: 153# CHECK-NEXT: S_STORE_DWORD 154# CHECK-NEXT: S_DCACHE_WB 155# CHECK-NEXT: S_ENDPGM 0 156 157name: one_block_store 158tracksRegLiveness: false 159machineFunctionInfo: 160 isEntryFunction: true 161 162body: | 163 bb.0: 164 S_ENDPGM 0 165 166 bb.1: 167 S_STORE_DWORD_SGPR undef $sgpr4, undef $sgpr6_sgpr7, undef $m0, 0, 0 168 S_ENDPGM 0 169... 170--- 171# CHECK-LABEL: name: si_return 172# CHECK: bb.0: 173# CHECK-NEXT: S_STORE_DWORD 174# CHECK-NEXT: S_WAITCNT 175# CHECK-NEXT: S_DCACHE_WB 176# CHECK-NEXT: SI_RETURN 177 178name: si_return 179tracksRegLiveness: false 180machineFunctionInfo: 181 isEntryFunction: true 182 183body: | 184 bb.0: 185 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0, 0 186 SI_RETURN_TO_EPILOG undef $vgpr0 187... 188