1# REQUIRES: asserts 2# RUN: llc -mtriple=amdgcn--- -verify-machineinstrs -debug-only=regalloc -run-pass=greedy -o /dev/null %s 2>&1 | FileCheck %s 3 4--- 5# Check that physreg candidate is not used since cannot be spilled in a block, 6# e.g. before exec mask preamble 7# CHECK: , cannot spill all interferences. 8 9name: foo 10tracksRegLiveness: true 11machineFunctionInfo: 12 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3 13 stackPtrOffsetReg: $sgpr32 14body: | 15 bb.0: 16 liveins: $sgpr96_sgpr97, $sgpr98_sgpr99, $sgpr100_sgpr101, $sgpr102_sgpr103 17 18 %0:sreg_64 = COPY $sgpr102_sgpr103 19 %1:sgpr_128 = COPY $sgpr100_sgpr101_sgpr102_sgpr103 20 %2:sgpr_128 = COPY %1 21 %3:sgpr_128 = COPY %1 22 %4:sgpr_128 = COPY %1 23 %5:sgpr_128 = COPY %1 24 %6:sgpr_128 = COPY %1 25 %7:sgpr_128 = COPY %1 26 %8:sgpr_128 = COPY %1 27 %9:sgpr_128 = COPY %1 28 %10:sgpr_128 = COPY %1 29 %11:sgpr_128 = COPY %1 30 %12:sgpr_128 = COPY %1 31 %13:sgpr_128 = COPY %1 32 %14:sgpr_128 = COPY %1 33 %15:sgpr_128 = COPY %1 34 %16:sgpr_128 = COPY %1 35 %17:sgpr_128 = COPY %1 36 %18:sgpr_128 = COPY %1 37 %19:sgpr_128 = COPY %1 38 %20:sgpr_128 = COPY %1 39 %21:sgpr_128 = COPY %1 40 %22:sgpr_128 = COPY %1 41 %23:sgpr_128 = COPY %1 42 %24:sgpr_128 = COPY %1 43 %25:sgpr_128 = COPY %1 44 %26:sgpr_128 = COPY %1 45 S_BRANCH %bb.1 46 47 bb.1: 48 liveins: $sgpr96_sgpr97, $sgpr98_sgpr99, $sgpr102_sgpr103 49 50 %0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr96_sgpr97, implicit-def $exec, implicit-def $scc, implicit $exec 51 $exec = S_XOR_B64_term $exec, %0, implicit-def $scc 52 SI_MASK_BRANCH %bb.3, implicit $exec 53 S_BRANCH %bb.2 54 55 bb.2: 56 liveins: $sgpr98_sgpr99, $sgpr102_sgpr103 57 58 %0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr98_sgpr99, implicit-def $exec, implicit-def $scc, implicit $exec 59 $exec = S_XOR_B64_term $exec, %0, implicit-def $scc 60 SI_MASK_BRANCH %bb.3, implicit $exec 61 S_BRANCH %bb.4 62 63 bb.3: 64 liveins: $sgpr102_sgpr103 65 66 %0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr102_sgpr103, implicit-def $exec, implicit-def $scc, implicit $exec 67 $exec = S_XOR_B64_term $exec, %0, implicit-def $scc 68 S_BRANCH %bb.4 69 70 bb.4: 71 S_CMP_EQ_U64 %1.sub0_sub1, %2.sub2_sub3, implicit-def $scc 72 S_CMP_EQ_U64 %3.sub0_sub1, %4.sub2_sub3, implicit-def $scc 73 S_CMP_EQ_U64 %5.sub0_sub1, %6.sub2_sub3, implicit-def $scc 74 S_CMP_EQ_U64 %7.sub0_sub1, %8.sub2_sub3, implicit-def $scc 75 S_CMP_EQ_U64 %9.sub0_sub1, %10.sub2_sub3, implicit-def $scc 76 S_CMP_EQ_U64 %11.sub0_sub1, %12.sub2_sub3, implicit-def $scc 77 S_CMP_EQ_U64 %13.sub0_sub1, %14.sub2_sub3, implicit-def $scc 78 S_CMP_EQ_U64 %15.sub0_sub1, %16.sub2_sub3, implicit-def $scc 79 S_CMP_EQ_U64 %17.sub0_sub1, %18.sub2_sub3, implicit-def $scc 80 S_CMP_EQ_U64 %19.sub0_sub1, %20.sub2_sub3, implicit-def $scc 81 S_CMP_EQ_U64 %21.sub0_sub1, %22.sub2_sub3, implicit-def $scc 82 S_CMP_EQ_U64 %23.sub0_sub1, %24.sub2_sub3, implicit-def $scc 83 S_CMP_EQ_U64 %25.sub0_sub1, %26.sub2_sub3, implicit-def $scc 84 $vgpr0 = V_MOV_B32_e32 0, implicit $exec 85 S_SETPC_B64_return undef $sgpr30_sgpr31, implicit %0, implicit $vgpr0 86... 87