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1; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2
3; Check that we do not use AGPRs for v32i32 type
4
5; GCN-LABEL: {{^}}test_v1024:
6; GCN-NOT: v_accvgpr
7; GCN-COUNT-32: v_mov_b32_e32
8; GCN-NOT: v_accvgpr
9define amdgpu_kernel void @test_v1024() {
10entry:
11  %alloca = alloca <32 x i32>, align 16, addrspace(5)
12  %cast = bitcast <32 x i32> addrspace(5)* %alloca to i8 addrspace(5)*
13  br i1 undef, label %if.then.i.i, label %if.else.i
14
15if.then.i.i:                                      ; preds = %entry
16  call void @llvm.memcpy.p5i8.p5i8.i64(i8 addrspace(5)* align 16 %cast, i8 addrspace(5)* align 4 undef, i64 128, i1 false)
17  br label %if.then.i62.i
18
19if.else.i:                                        ; preds = %entry
20  br label %if.then.i62.i
21
22if.then.i62.i:                                    ; preds = %if.else.i, %if.then.i.i
23  call void @llvm.memcpy.p1i8.p5i8.i64(i8 addrspace(1)* align 4 undef, i8 addrspace(5)* align 16 %cast, i64 128, i1 false)
24  ret void
25}
26
27declare void @llvm.memcpy.p5i8.p5i8.i64(i8 addrspace(5)* nocapture writeonly, i8 addrspace(5)* nocapture readonly, i64, i1 immarg)
28
29declare void @llvm.memcpy.p1i8.p5i8.i64(i8 addrspace(1)* nocapture writeonly, i8 addrspace(5)* nocapture readonly, i64, i1 immarg)
30