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1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s
2; RUN: llc < %s -mtriple=thumbv8 | FileCheck -check-prefix=CHECK-V8 %s
3; RUN: llc < %s -mtriple=thumbv7 -arm-restrict-it | FileCheck -check-prefix=CHECK-V8 %s
4
5define i32 @t1(i32 %a, i32 %b, i8** %retaddr) {
6; CHECK-LABEL: t1:
7; CHECK: Block address taken
8; CHECK-NOT: Address of block that was removed by CodeGen
9  store i8* blockaddress(@t1, %cond_true), i8** %retaddr
10  %tmp2 = icmp eq i32 %a, 0
11  br i1 %tmp2, label %cond_false, label %cond_true
12
13cond_true:
14  %tmp5 = add i32 %b, 1
15  ret i32 %tmp5
16
17cond_false:
18  %tmp7 = add i32 %b, -1
19  ret i32 %tmp7
20}
21
22define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d, i8** %retaddr) {
23; CHECK-LABEL: t2:
24; CHECK: Block address taken
25; CHECK: %cond_true
26; CHECK: add
27; CHECK: bx lr
28  store i8* blockaddress(@t2, %cond_true), i8** %retaddr
29  %tmp2 = icmp sgt i32 %c, 10
30  %tmp5 = icmp slt i32 %d, 4
31  %tmp8 = and i1 %tmp5, %tmp2
32  %tmp13 = add i32 %b, %a
33  br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
34
35cond_true:
36  %tmp15 = add i32 %tmp13, %c
37  %tmp1821 = sub i32 %tmp15, %d
38  ret i32 %tmp1821
39
40UnifiedReturnBlock:
41  ret i32 %tmp13
42}
43
44define hidden fastcc void @t3(i8** %retaddr, i1 %tst, i8* %p8) {
45; CHECK-LABEL: t3:
46; CHECK: Block address taken
47; CHECK-NOT: Address of block that was removed by CodeGen
48bb:
49  store i8* blockaddress(@t3, %KBBlockZero_return_1), i8** %retaddr
50  br i1 %tst, label %bb77, label %bb7.i
51
52bb7.i:                                            ; preds = %bb35
53  br label %bb2.i
54
55KBBlockZero_return_1:                             ; preds = %KBBlockZero.exit
56  ret void
57
58KBBlockZero_return_0:                             ; preds = %KBBlockZero.exit
59  ret void
60
61bb77:                                             ; preds = %bb26, %bb12, %bb
62  ret void
63
64bb2.i:                                            ; preds = %bb6.i350, %bb7.i
65  br i1 %tst, label %bb6.i350, label %KBBlockZero.exit
66
67bb6.i350:                                         ; preds = %bb2.i
68  br label %bb2.i
69
70KBBlockZero.exit:                                 ; preds = %bb2.i
71  indirectbr i8* %p8, [label %KBBlockZero_return_1, label %KBBlockZero_return_0]
72}
73
74@foo = global i32 ()* null
75define i32 @t4(i32 %x, i32 ()* %p_foo) {
76entry:
77;CHECK-LABEL: t4:
78;CHECK-V8-LABEL: t4:
79  %cmp = icmp slt i32 %x, 60
80  br i1 %cmp, label %if.then, label %if.else
81
82if.then:                                          ; preds = %entry
83  %tmp.2 = call i32 %p_foo()
84  %sub = add nsw i32 %x, -1
85  br label %return
86
87if.else:                                          ; preds = %entry
88  %sub1 = add nsw i32 %x, -120
89  br label %return
90
91return:                                           ; preds = %if.end5, %if.then4, %if.then
92  %retval.0 = phi i32 [ %sub, %if.then ], [ %sub1, %if.else ]
93  ret i32 %retval.0
94}
95
96; If-converter was checking for the wrong predicate subsumes pattern when doing
97; nested predicates.
98; E.g., Let A be a basic block that flows conditionally into B and B be a
99; predicated block.
100; B can be predicated with A.BrToBPredicate into A iff B.Predicate is less
101; "permissive" than A.BrToBPredicate, i.e., iff A.BrToBPredicate subsumes
102; B.Predicate.
103
104; Hard-coded registers comes from the ABI.
105; CHECK-LABEL: wrapDistance:
106; CHECK: cmp r1, #59
107; CHECK-NEXT: itt le
108; CHECK-NEXT: suble r0, r2, #1
109; CHECK-NEXT: bxle lr
110; CHECK-NEXT: LBB{{.*}}:
111; CHECK-NEXT: subs [[REG:r[0-9]+]], #120
112; CHECK-NEXT: cmp [[REG]], r1
113; CHECK-NOT: it lt
114; CHECK-NEXT: bge [[LABEL:.+]]
115; Next BB
116; CHECK-NOT: cmplt
117; CHECK: cmp r0, #119
118; CHECK-NEXT: itt le
119; CHECK-NEXT: addle r0, r1, #1
120; CHECK-NEXT: bxle lr
121; Next BB
122; CHECK: [[LABEL]]:
123; CHECK-NEXT: subs r0, r1, r0
124; CHECK-NEXT: bx lr
125
126; CHECK-V8-LABEL: wrapDistance:
127; CHECK-V8: cmp r1, #59
128; CHECK-V8-NEXT: bgt
129; CHECK-V8-NEXT: %if.then
130; CHECK-V8-NEXT: subs r0, r2, #1
131; CHECK-V8-NEXT: bx lr
132; CHECK-V8-NEXT: %if.else
133; CHECK-V8-NEXT: subs [[REG:r[0-9]+]], #120
134; CHECK-V8-NEXT: cmp [[REG]], r1
135; CHECK-V8-NEXT: bge
136; CHECK-V8-NEXT: %if.else
137; CHECK-V8-NEXT: cmp r0, #119
138; CHECK-V8-NEXT: bgt
139; CHECK-V8-NEXT: %if.then4
140; CHECK-V8-NEXT: adds r0, r1, #1
141; CHECK-V8-NEXT: bx lr
142; CHECK-V8-NEXT: %if.end5
143; CHECK-V8-NEXT: subs r0, r1, r0
144; CHECK-V8-NEXT: bx lr
145
146define i32 @wrapDistance(i32 %tx, i32 %sx, i32 %w) {
147entry:
148  %cmp = icmp slt i32 %sx, 60
149  br i1 %cmp, label %if.then, label %if.else
150
151if.then:                                          ; preds = %entry
152  %sub = add nsw i32 %w, -1
153  br label %return
154
155if.else:                                          ; preds = %entry
156  %sub1 = add nsw i32 %w, -120
157  %cmp2 = icmp slt i32 %sub1, %sx
158  %cmp3 = icmp slt i32 %tx, 120
159  %or.cond = and i1 %cmp2, %cmp3
160  br i1 %or.cond, label %if.then4, label %if.end5
161
162if.then4:                                         ; preds = %if.else
163  %add = add nsw i32 %sx, 1
164  br label %return
165
166if.end5:                                          ; preds = %if.else
167  %sub6 = sub nsw i32 %sx, %tx
168  br label %return
169
170return:                                           ; preds = %if.end5, %if.then4, %if.then
171  %retval.0 = phi i32 [ %sub, %if.then ], [ %add, %if.then4 ], [ %sub6, %if.end5 ]
172  ret i32 %retval.0
173}
174