1; RUN: llc -O0 -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s 2; RUN: llc -O0 -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s 3; RUN: llc -O0 -mtriple thumbv7-windows-mingw32 -filetype asm -o - %s | FileCheck %s 4 5declare arm_aapcs_vfpcc i32 @num_entries() 6 7define arm_aapcs_vfpcc void @test___builtin_alloca() { 8entry: 9 %array = alloca i8*, align 4 10 %call = call arm_aapcs_vfpcc i32 @num_entries() 11 %mul = mul i32 4, %call 12 %0 = alloca i8, i32 %mul 13 store i8* %0, i8** %array, align 4 14 ret void 15} 16 17; CHECK: bl num_entries 18; Any register is actually valid here, but turns out we use lr, 19; because we do not have the kill flag on R0. 20; CHECK: mov [[R0:r[0-9]+]], r0 21; CHECK: movs [[R1:r[0-9]+]], #7 22; CHECK: add.w [[R2:r[0-9]+]], [[R1]], [[R0]], lsl #2 23; CHECK: bic [[R2]], [[R2]], #4 24; CHECK: lsrs r4, [[R2]], #2 25; CHECK: bl __chkstk 26; CHECK: sub.w sp, sp, r4 27 28