1; This tests that MC/asm header conversion is smooth and that the 2; build attributes are correct 3 4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE 5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6 6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST 7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S 13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST 14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M 16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST 17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7 19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 20; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST 21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8 22; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST 23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8 25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8 27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON 28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON 29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO 30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE 31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE 32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP 33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT 34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST 35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,-d32 | FileCheck %s --check-prefix=CORTEX-A5-NONEON 37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A5-NOFPU 38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST 39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST 41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD 42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST 43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST 47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD 48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST 49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT 51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST 53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A12-NOFPU 54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST 55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15 57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST 58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT 60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST 61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A17-NOFPU 62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST 63 64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-no-trapping-fp-math | FileCheck %s --check-prefix=NO-TRAPPING-MATH 65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=ieee | FileCheck %s --check-prefix=DENORMAL-IEEE 66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=preserve-sign | FileCheck %s --check-prefix=DENORMAL-PRESERVE-SIGN 67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=positive-zero | FileCheck %s --check-prefix=DENORMAL-POSITIVE-ZERO 68 69; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16 70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-d32,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16 71; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD 72; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16 73; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16 74 75; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0 77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST 78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS 80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST 81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1 83; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST 84; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 85; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000 86; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST 87; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3 89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST 90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300 92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST 93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 94; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT 95; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST 96; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD 97; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST 98; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT 100; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST 101; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-fp64 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE 102; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-fp64 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST 103; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE 104; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 105; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=CORTEX-M23 106; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CORTEX-M33 107; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M33-FAST 108; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 109 110; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=CORTEX-M35P 111; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 112 113; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 114; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F 115; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 116; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST 117; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 118; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7 119; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST 120; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 121; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8 122; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST 123; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32 125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST 126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 127; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35 128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST 129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 130; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53 131; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST 132; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 133; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57 134; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST 135; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 136; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72 137; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST 138; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 139; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73 140; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A 141; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=EXYNOS-M3 142; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 143; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 144; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=EXYNOS-M4 145; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 146; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 147; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=EXYNOS-M5 148; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 149; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 150; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST 151; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 152; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK 153; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST 154; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2sp,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU 155; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2sp,-vfp3,-vfp4,-neon,-fp16 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST 156; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 157; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 158; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST 159; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,-d32,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 160; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC 161; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER 162; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER 163; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER 164; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE 165; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE 166; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi | FileCheck %s --check-prefix=RELOC-ROPI 167; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=rwpi | FileCheck %s --check-prefix=RELOC-RWPI 168; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi-rwpi | FileCheck %s --check-prefix=RELOC-ROPI-RWPI 169 170; ARMv8.1a (AArch32) 171; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 172; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 173; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 174; ARMv8a (AArch32) 175; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 176; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 177; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 178; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 179; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 180; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 181; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 182; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 183; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 184; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 185; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 186; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 187; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 188; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 189 190; ARMv7a 191; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 192; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 193; ARMv7ve 194; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE 195; ARMv7r 196; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 197; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 198; ARMv7em 199; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 200; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 201; ARMv7m 202; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 203; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 204; ARMv6 205; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 206; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 207; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 208; ARMv6k 209; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN 210; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED 211; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 212; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 213; ARMv6m 214; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 215; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN 216; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 217; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 218; ARMv5 219; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN 220; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 221 222; ARMv8-R 223; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-vfp2sp,-fp16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NOFPU 224; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,-fp64,-d32 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP 225; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON 226 227; ARMv8-M 228; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=STRICT-ALIGN 229; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 230; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 231; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=NO-STRICT-ALIGN 232; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 233; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi | FileCheck %s --check-prefix=ARMv81M-MAIN 234; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEINT 235; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEFP 236; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m55 | FileCheck %s --check-prefix=CORTEX-M55 237 238; CPU-SUPPORTED-NOT: is not a recognized processor for this target 239 240; XSCALE: .eabi_attribute 6, 5 241; XSCALE: .eabi_attribute 8, 1 242; XSCALE: .eabi_attribute 9, 1 243 244; DYN-ROUNDING: .eabi_attribute 19, 1 245 246; V6: .eabi_attribute 6, 6 247; V6: .eabi_attribute 8, 1 248;; We assume round-to-nearest by default (matches GCC) 249; V6-NOT: .eabi_attribute 27 250; V6-NOT: .eabi_attribute 36 251; V6-NOT: .eabi_attribute 42 252; V6-NOT: .eabi_attribute 44 253; V6-NOT: .eabi_attribute 68 254; V6-NOT: .eabi_attribute 19 255;; The default choice made by llc is for a V6 CPU without an FPU. 256;; This is not an interesting detail, but for such CPUs, the default intention is to use 257;; software floating-point support. The choice is not important for targets without 258;; FPU support! 259; V6: .eabi_attribute 20, 1 260; V6: .eabi_attribute 21, 1 261; V6-NOT: .eabi_attribute 22 262; V6: .eabi_attribute 23, 3 263; V6: .eabi_attribute 24, 1 264; V6: .eabi_attribute 25, 1 265; V6-NOT: .eabi_attribute 28 266; V6: .eabi_attribute 38, 1 267 268; V6-FAST-NOT: .eabi_attribute 19 269;; Despite the V6 CPU having no FPU by default, we chose to flush to 270;; positive zero here. There's no hardware support doing this, but the 271;; fast maths software library might. 272; V6-FAST-NOT: .eabi_attribute 20 273; V6-FAST-NOT: .eabi_attribute 21 274; V6-FAST-NOT: .eabi_attribute 22 275; V6-FAST: .eabi_attribute 23, 1 276 277;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for 278;; V6-M, however we don't model the OS extension so this is fine. 279; V6M: .eabi_attribute 6, 12 280; V6M: .eabi_attribute 7, 77 281; V6M: .eabi_attribute 8, 0 282; V6M: .eabi_attribute 9, 1 283; V6M-NOT: .eabi_attribute 27 284; V6M-NOT: .eabi_attribute 36 285; V6M-NOT: .eabi_attribute 42 286; V6M-NOT: .eabi_attribute 44 287; V6M-NOT: .eabi_attribute 68 288; V6M-NOT: .eabi_attribute 19 289;; The default choice made by llc is for a V6M CPU without an FPU. 290;; This is not an interesting detail, but for such CPUs, the default intention is to use 291;; software floating-point support. The choice is not important for targets without 292;; FPU support! 293; V6M: .eabi_attribute 20, 1 294; V6M: .eabi_attribute 21, 1 295; V6M-NOT: .eabi_attribute 22 296; V6M: .eabi_attribute 23, 3 297; V6M: .eabi_attribute 24, 1 298; V6M: .eabi_attribute 25, 1 299; V6M-NOT: .eabi_attribute 28 300; V6M: .eabi_attribute 38, 1 301 302; V6M-FAST-NOT: .eabi_attribute 19 303;; Despite the V6M CPU having no FPU by default, we chose to flush to 304;; positive zero here. There's no hardware support doing this, but the 305;; fast maths software library might. 306; V6M-FAST-NOT: .eabi_attribute 20 307; V6M-FAST-NOT: .eabi_attribute 21 308; V6M-FAST-NOT: .eabi_attribute 22 309; V6M-FAST: .eabi_attribute 23, 1 310 311; ARM1156T2F-S: .cpu arm1156t2f-s 312; ARM1156T2F-S: .eabi_attribute 6, 8 313; ARM1156T2F-S: .eabi_attribute 8, 1 314; ARM1156T2F-S: .eabi_attribute 9, 2 315; ARM1156T2F-S: .fpu vfpv2 316; ARM1156T2F-S-NOT: .eabi_attribute 27 317; ARM1156T2F-S-NOT: .eabi_attribute 36 318; ARM1156T2F-S-NOT: .eabi_attribute 42 319; ARM1156T2F-S-NOT: .eabi_attribute 44 320; ARM1156T2F-S-NOT: .eabi_attribute 68 321; ARM1156T2F-S-NOT: .eabi_attribute 19 322;; We default to IEEE 754 compliance 323; ARM1156T2F-S: .eabi_attribute 20, 1 324; ARM1156T2F-S: .eabi_attribute 21, 1 325; ARM1156T2F-S-NOT: .eabi_attribute 22 326; ARM1156T2F-S: .eabi_attribute 23, 3 327; ARM1156T2F-S: .eabi_attribute 24, 1 328; ARM1156T2F-S: .eabi_attribute 25, 1 329; ARM1156T2F-S-NOT: .eabi_attribute 28 330; ARM1156T2F-S: .eabi_attribute 38, 1 331 332; ARM1156T2F-S-FAST-NOT: .eabi_attribute 19 333;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally 334;; valid for this core, it's an implementation defined question as to which of 0 and 2 you 335;; select. LLVM historically picks 0. 336; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20 337; ARM1156T2F-S-FAST-NOT: .eabi_attribute 21 338; ARM1156T2F-S-FAST-NOT: .eabi_attribute 22 339; ARM1156T2F-S-FAST: .eabi_attribute 23, 1 340 341; V7M: .eabi_attribute 6, 10 342; V7M: .eabi_attribute 7, 77 343; V7M: .eabi_attribute 8, 0 344; V7M: .eabi_attribute 9, 2 345; V7M-NOT: .eabi_attribute 27 346; V7M-NOT: .eabi_attribute 36 347; V7M-NOT: .eabi_attribute 42 348; V7M-NOT: .eabi_attribute 44 349; V7M-NOT: .eabi_attribute 68 350; V7M-NOT: .eabi_attribute 19 351;; The default choice made by llc is for a V7M CPU without an FPU. 352;; This is not an interesting detail, but for such CPUs, the default intention is to use 353;; software floating-point support. The choice is not important for targets without 354;; FPU support! 355; V7M: .eabi_attribute 20, 1 356; V7M: .eabi_attribute 21, 1 357; V7M-NOT: .eabi_attribute 22 358; V7M: .eabi_attribute 23, 3 359; V7M: .eabi_attribute 24, 1 360; V7M: .eabi_attribute 25, 1 361; V7M-NOT: .eabi_attribute 28 362; V7M: .eabi_attribute 38, 1 363 364; V7M-FAST-NOT: .eabi_attribute 19 365;; Despite the V7M CPU having no FPU by default, we chose to flush 366;; preserving sign. This matches what the hardware would do in the 367;; architecture revision were to exist on the current target. 368; V7M-FAST: .eabi_attribute 20, 2 369; V7M-FAST-NOT: .eabi_attribute 21 370; V7M-FAST-NOT: .eabi_attribute 22 371; V7M-FAST: .eabi_attribute 23, 1 372 373; V7: .syntax unified 374; V7: .eabi_attribute 6, 10 375; V7-NOT: .eabi_attribute 27 376; V7-NOT: .eabi_attribute 36 377; V7-NOT: .eabi_attribute 42 378; V7-NOT: .eabi_attribute 44 379; V7-NOT: .eabi_attribute 68 380; V7-NOT: .eabi_attribute 19 381;; In safe-maths mode we default to an IEEE 754 compliant choice. 382; V7: .eabi_attribute 20, 1 383; V7: .eabi_attribute 21, 1 384; V7-NOT: .eabi_attribute 22 385; V7: .eabi_attribute 23, 3 386; V7: .eabi_attribute 24, 1 387; V7: .eabi_attribute 25, 1 388; V7-NOT: .eabi_attribute 28 389; V7: .eabi_attribute 38, 1 390 391; V7-FAST-NOT: .eabi_attribute 19 392;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes 393;; denormals to zero preserving the sign. 394; V7-FAST: .eabi_attribute 20, 2 395; V7-FAST-NOT: .eabi_attribute 21 396; V7-FAST-NOT: .eabi_attribute 22 397; V7-FAST: .eabi_attribute 23, 1 398 399; V7VE: .syntax unified 400; V7VE: .eabi_attribute 6, 10 @ Tag_CPU_arch 401; V7VE: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile 402; V7VE: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use 403; V7VE: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use 404; V7VE: .eabi_attribute 42, 1 @ Tag_MPextension_use 405; V7VE: .eabi_attribute 44, 2 @ Tag_DIV_use 406; V7VE: .eabi_attribute 68, 3 @ Tag_Virtualization_use 407; V7VE: .eabi_attribute 17, 1 @ Tag_ABI_PCS_GOT_use 408; V7VE: .eabi_attribute 20, 1 @ Tag_ABI_FP_denormal 409; V7VE: .eabi_attribute 21, 1 @ Tag_ABI_FP_exceptions 410; V7VE: .eabi_attribute 23, 3 @ Tag_ABI_FP_number_model 411; V7VE: .eabi_attribute 24, 1 @ Tag_ABI_align_needed 412; V7VE: .eabi_attribute 25, 1 @ Tag_ABI_align_preserved 413; V7VE: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format 414 415; V8: .syntax unified 416; V8: .eabi_attribute 67, "2.09" 417; V8: .eabi_attribute 6, 14 418; V8-NOT: .eabi_attribute 44 419; V8-NOT: .eabi_attribute 19 420; V8: .eabi_attribute 20, 1 421; V8: .eabi_attribute 21, 1 422; V8-NOT: .eabi_attribute 22 423; V8: .eabi_attribute 23, 3 424 425; V8-FAST-NOT: .eabi_attribute 19 426;; The default does have an FPU, and for V8-A, it flushes preserving sign. 427; V8-FAST: .eabi_attribute 20, 2 428; V8-FAST-NOT: .eabi_attribute 21 429; V8-FAST-NOT: .eabi_attribute 22 430; V8-FAST: .eabi_attribute 23, 1 431 432; Vt8: .syntax unified 433; Vt8: .eabi_attribute 6, 14 434; Vt8-NOT: .eabi_attribute 19 435; Vt8: .eabi_attribute 20, 1 436; Vt8: .eabi_attribute 21, 1 437; Vt8-NOT: .eabi_attribute 22 438; Vt8: .eabi_attribute 23, 3 439 440; V8-FPARMv8: .syntax unified 441; V8-FPARMv8: .eabi_attribute 6, 14 442; V8-FPARMv8: .fpu fp-armv8 443 444; V8-NEON: .syntax unified 445; V8-NEON: .eabi_attribute 6, 14 446; V8-NEON: .fpu neon 447; V8-NEON: .eabi_attribute 12, 3 448 449; V8-FPARMv8-NEON: .syntax unified 450; V8-FPARMv8-NEON: .eabi_attribute 6, 14 451; V8-FPARMv8-NEON: .fpu neon-fp-armv8 452; V8-FPARMv8-NEON: .eabi_attribute 12, 3 453 454; V8-FPARMv8-NEON-CRYPTO: .syntax unified 455; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14 456; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8 457; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3 458 459; V8MBASELINE: .syntax unified 460; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline 461; V8MBASELINE: .eabi_attribute 6, 16 462; '7' is Tag_CPU_arch_profile, '77' is 'M' 463; V8MBASELINE: .eabi_attribute 7, 77 464; '8' is Tag_ARM_ISA_use 465; V8MBASELINE: .eabi_attribute 8, 0 466; '9' is Tag_Thumb_ISA_use 467; V8MBASELINE: .eabi_attribute 9, 3 468 469; V8MMAINLINE: .syntax unified 470; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline 471; V8MMAINLINE: .eabi_attribute 6, 17 472; V8MMAINLINE: .eabi_attribute 7, 77 473; V8MMAINLINE: .eabi_attribute 8, 0 474; V8MMAINLINE: .eabi_attribute 9, 3 475; V8MMAINLINE_DSP-NOT: .eabi_attribute 46 476 477; V8MMAINLINE_DSP: .syntax unified 478; V8MBASELINE_DSP: .eabi_attribute 6, 17 479; V8MBASELINE_DSP: .eabi_attribute 7, 77 480; V8MMAINLINE_DSP: .eabi_attribute 8, 0 481; V8MMAINLINE_DSP: .eabi_attribute 9, 3 482; V8MMAINLINE_DSP: .eabi_attribute 46, 1 483 484; Tag_CPU_unaligned_access 485; NO-STRICT-ALIGN: .eabi_attribute 34, 1 486; STRICT-ALIGN: .eabi_attribute 34, 0 487 488; Tag_CPU_arch 'ARMv7' 489; CORTEX-A7-CHECK: .eabi_attribute 6, 10 490; CORTEX-A7-NOFPU: .eabi_attribute 6, 10 491 492; CORTEX-A7-FPUV4: .eabi_attribute 6, 10 493 494; Tag_CPU_arch_profile 'A' 495; CORTEX-A7-CHECK: .eabi_attribute 7, 65 496; CORTEX-A7-NOFPU: .eabi_attribute 7, 65 497; CORTEX-A7-FPUV4: .eabi_attribute 7, 65 498 499; Tag_ARM_ISA_use 500; CORTEX-A7-CHECK: .eabi_attribute 8, 1 501; CORTEX-A7-NOFPU: .eabi_attribute 8, 1 502; CORTEX-A7-FPUV4: .eabi_attribute 8, 1 503 504; Tag_THUMB_ISA_use 505; CORTEX-A7-CHECK: .eabi_attribute 9, 2 506; CORTEX-A7-NOFPU: .eabi_attribute 9, 2 507; CORTEX-A7-FPUV4: .eabi_attribute 9, 2 508 509; CORTEX-A7-CHECK: .fpu neon-vfpv4 510; CORTEX-A7-NOFPU-NOT: .fpu 511; CORTEX-A7-FPUV4: .fpu vfpv4 512 513; CORTEX-A7-CHECK-NOT: .eabi_attribute 19 514 515; Tag_FP_HP_extension 516; CORTEX-A7-CHECK: .eabi_attribute 36, 1 517; CORTEX-A7-NOFPU-NOT: .eabi_attribute 36 518; CORTEX-A7-FPUV4: .eabi_attribute 36, 1 519 520; Tag_MPextension_use 521; CORTEX-A7-CHECK: .eabi_attribute 42, 1 522; CORTEX-A7-NOFPU: .eabi_attribute 42, 1 523; CORTEX-A7-FPUV4: .eabi_attribute 42, 1 524 525; Tag_DIV_use 526; CORTEX-A7-CHECK: .eabi_attribute 44, 2 527; CORTEX-A7-NOFPU: .eabi_attribute 44, 2 528; CORTEX-A7-FPUV4: .eabi_attribute 44, 2 529 530; Tag_DSP_extension 531; CORTEX-A7-CHECK-NOT: .eabi_attribute 46 532 533; Tag_Virtualization_use 534; CORTEX-A7-CHECK: .eabi_attribute 68, 3 535; CORTEX-A7-NOFPU: .eabi_attribute 68, 3 536; CORTEX-A7-FPUV4: .eabi_attribute 68, 3 537 538; Tag_ABI_FP_denormal 539;; We default to IEEE 754 compliance 540; CORTEX-A7-CHECK: .eabi_attribute 20, 1 541;; The A7 has VFPv3 support by default, so flush preserving sign. 542; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2 543; CORTEX-A7-NOFPU: .eabi_attribute 20, 1 544;; Despite there being no FPU, we chose to flush to zero preserving 545;; sign. This matches what the hardware would do for this architecture 546;; revision. 547; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2 548; CORTEX-A7-FPUV4: .eabi_attribute 20, 1 549;; The VFPv4 FPU flushes preserving sign. 550; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2 551 552; Tag_ABI_FP_exceptions 553; CORTEX-A7-CHECK: .eabi_attribute 21, 1 554; CORTEX-A7-NOFPU: .eabi_attribute 21, 1 555; CORTEX-A7-FPUV4: .eabi_attribute 21, 1 556 557; Tag_ABI_FP_user_exceptions 558; CORTEX-A7-CHECK-NOT: .eabi_attribute 22 559; CORTEX-A7-NOFPU-NOT: .eabi_attribute 22 560; CORTEX-A7-FPUV4-NOT: .eabi_attribute 22 561 562; Tag_ABI_FP_number_model 563; CORTEX-A7-CHECK: .eabi_attribute 23, 3 564; CORTEX-A7-NOFPU: .eabi_attribute 23, 3 565; CORTEX-A7-FPUV4: .eabi_attribute 23, 3 566 567; Tag_ABI_align_needed 568; CORTEX-A7-CHECK: .eabi_attribute 24, 1 569; CORTEX-A7-NOFPU: .eabi_attribute 24, 1 570; CORTEX-A7-FPUV4: .eabi_attribute 24, 1 571 572; Tag_ABI_align_preserved 573; CORTEX-A7-CHECK: .eabi_attribute 25, 1 574; CORTEX-A7-NOFPU: .eabi_attribute 25, 1 575; CORTEX-A7-FPUV4: .eabi_attribute 25, 1 576 577; Tag_FP_16bit_format 578; CORTEX-A7-CHECK: .eabi_attribute 38, 1 579; CORTEX-A7-NOFPU: .eabi_attribute 38, 1 580; CORTEX-A7-FPUV4: .eabi_attribute 38, 1 581 582; CORTEX-A5-DEFAULT: .cpu cortex-a5 583; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10 584; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65 585; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1 586; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2 587; CORTEX-A5-DEFAULT: .fpu neon-vfpv4 588; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1 589; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 44 590; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1 591; CORTEX-A5-NOT: .eabi_attribute 19 592;; We default to IEEE 754 compliance 593; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1 594; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1 595; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 22 596; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3 597; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1 598; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1 599 600; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19 601;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math 602;; is given. 603; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2 604; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21 605; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22 606; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1 607 608; CORTEX-A5-NONEON: .cpu cortex-a5 609; CORTEX-A5-NONEON: .eabi_attribute 6, 10 610; CORTEX-A5-NONEON: .eabi_attribute 7, 65 611; CORTEX-A5-NONEON: .eabi_attribute 8, 1 612; CORTEX-A5-NONEON: .eabi_attribute 9, 2 613; CORTEX-A5-NONEON: .fpu vfpv4-d16 614; CORTEX-A5-NONEON: .eabi_attribute 42, 1 615; CORTEX-A5-NONEON: .eabi_attribute 68, 1 616;; We default to IEEE 754 compliance 617; CORTEX-A5-NONEON: .eabi_attribute 20, 1 618; CORTEX-A5-NONEON: .eabi_attribute 21, 1 619; CORTEX-A5-NONEON-NOT: .eabi_attribute 22 620; CORTEX-A5-NONEON: .eabi_attribute 23, 3 621; CORTEX-A5-NONEON: .eabi_attribute 24, 1 622; CORTEX-A5-NONEON: .eabi_attribute 25, 1 623 624; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19 625;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math 626;; is given. 627; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2 628; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21 629; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22 630; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1 631 632; CORTEX-A5-NOFPU: .cpu cortex-a5 633; CORTEX-A5-NOFPU: .eabi_attribute 6, 10 634; CORTEX-A5-NOFPU: .eabi_attribute 7, 65 635; CORTEX-A5-NOFPU: .eabi_attribute 8, 1 636; CORTEX-A5-NOFPU: .eabi_attribute 9, 2 637; CORTEX-A5-NOFPU-NOT: .fpu 638; CORTEX-A5-NOFPU: .eabi_attribute 42, 1 639; CORTEX-A5-NOFPU: .eabi_attribute 68, 1 640; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19 641;; We default to IEEE 754 compliance 642; CORTEX-A5-NOFPU: .eabi_attribute 20, 1 643; CORTEX-A5-NOFPU: .eabi_attribute 21, 1 644; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22 645; CORTEX-A5-NOFPU: .eabi_attribute 23, 3 646; CORTEX-A5-NOFPU: .eabi_attribute 24, 1 647; CORTEX-A5-NOFPU: .eabi_attribute 25, 1 648 649; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19 650;; Despite there being no FPU, we chose to flush to zero preserving 651;; sign. This matches what the hardware would do for this architecture 652;; revision. 653; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2 654; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21 655; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22 656; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1 657 658; CORTEX-A8-SOFT: .cpu cortex-a8 659; CORTEX-A8-SOFT: .eabi_attribute 6, 10 660; CORTEX-A8-SOFT: .eabi_attribute 7, 65 661; CORTEX-A8-SOFT: .eabi_attribute 8, 1 662; CORTEX-A8-SOFT: .eabi_attribute 9, 2 663; CORTEX-A8-SOFT: .fpu neon 664; CORTEX-A8-SOFT-NOT: .eabi_attribute 27 665; CORTEX-A8-SOFT-NOT: .eabi_attribute 36, 1 666; CORTEX-A8-SOFT-NOT: .eabi_attribute 42, 1 667; CORTEX-A8-SOFT-NOT: .eabi_attribute 44 668; CORTEX-A8-SOFT: .eabi_attribute 68, 1 669; CORTEX-A8-SOFT-NOT: .eabi_attribute 19 670;; We default to IEEE 754 compliance 671; CORTEX-A8-SOFT: .eabi_attribute 20, 1 672; CORTEX-A8-SOFT: .eabi_attribute 21, 1 673; CORTEX-A8-SOFT-NOT: .eabi_attribute 22 674; CORTEX-A8-SOFT: .eabi_attribute 23, 3 675; CORTEX-A8-SOFT: .eabi_attribute 24, 1 676; CORTEX-A8-SOFT: .eabi_attribute 25, 1 677; CORTEX-A8-SOFT-NOT: .eabi_attribute 28 678; CORTEX-A8-SOFT: .eabi_attribute 38, 1 679 680; CORTEX-A9-SOFT: .cpu cortex-a9 681; CORTEX-A9-SOFT: .eabi_attribute 6, 10 682; CORTEX-A9-SOFT: .eabi_attribute 7, 65 683; CORTEX-A9-SOFT: .eabi_attribute 8, 1 684; CORTEX-A9-SOFT: .eabi_attribute 9, 2 685; CORTEX-A9-SOFT: .fpu neon 686; CORTEX-A9-SOFT-NOT: .eabi_attribute 27 687; CORTEX-A9-SOFT: .eabi_attribute 36, 1 688; CORTEX-A9-SOFT: .eabi_attribute 42, 1 689; CORTEX-A9-SOFT-NOT: .eabi_attribute 44 690; CORTEX-A9-SOFT: .eabi_attribute 68, 1 691; CORTEX-A9-SOFT-NOT: .eabi_attribute 19 692;; We default to IEEE 754 compliance 693; CORTEX-A9-SOFT: .eabi_attribute 20, 1 694; CORTEX-A9-SOFT: .eabi_attribute 21, 1 695; CORTEX-A9-SOFT-NOT: .eabi_attribute 22 696; CORTEX-A9-SOFT: .eabi_attribute 23, 3 697; CORTEX-A9-SOFT: .eabi_attribute 24, 1 698; CORTEX-A9-SOFT: .eabi_attribute 25, 1 699; CORTEX-A9-SOFT-NOT: .eabi_attribute 28 700; CORTEX-A9-SOFT: .eabi_attribute 38, 1 701 702; CORTEX-A8-SOFT-FAST-NOT: .eabi_attribute 19 703; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19 704;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 705;; -ffast-math is specified. 706; CORTEX-A8-SOFT-FAST: .eabi_attribute 20, 2 707; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2 708; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21 709; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22 710; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1 711 712; CORTEX-A8-HARD: .cpu cortex-a8 713; CORTEX-A8-HARD: .eabi_attribute 6, 10 714; CORTEX-A8-HARD: .eabi_attribute 7, 65 715; CORTEX-A8-HARD: .eabi_attribute 8, 1 716; CORTEX-A8-HARD: .eabi_attribute 9, 2 717; CORTEX-A8-HARD: .fpu neon 718; CORTEX-A8-HARD-NOT: .eabi_attribute 27 719; CORTEX-A8-HARD-NOT: .eabi_attribute 36, 1 720; CORTEX-A8-HARD-NOT: .eabi_attribute 42, 1 721; CORTEX-A8-HARD: .eabi_attribute 68, 1 722; CORTEX-A8-HARD-NOT: .eabi_attribute 19 723;; We default to IEEE 754 compliance 724; CORTEX-A8-HARD: .eabi_attribute 20, 1 725; CORTEX-A8-HARD: .eabi_attribute 21, 1 726; CORTEX-A8-HARD-NOT: .eabi_attribute 22 727; CORTEX-A8-HARD: .eabi_attribute 23, 3 728; CORTEX-A8-HARD: .eabi_attribute 24, 1 729; CORTEX-A8-HARD: .eabi_attribute 25, 1 730; CORTEX-A8-HARD: .eabi_attribute 28, 1 731; CORTEX-A8-HARD: .eabi_attribute 38, 1 732 733 734 735; CORTEX-A9-HARD: .cpu cortex-a9 736; CORTEX-A9-HARD: .eabi_attribute 6, 10 737; CORTEX-A9-HARD: .eabi_attribute 7, 65 738; CORTEX-A9-HARD: .eabi_attribute 8, 1 739; CORTEX-A9-HARD: .eabi_attribute 9, 2 740; CORTEX-A9-HARD: .fpu neon 741; CORTEX-A9-HARD-NOT: .eabi_attribute 27 742; CORTEX-A9-HARD: .eabi_attribute 36, 1 743; CORTEX-A9-HARD: .eabi_attribute 42, 1 744; CORTEX-A9-HARD: .eabi_attribute 68, 1 745; CORTEX-A9-HARD-NOT: .eabi_attribute 19 746;; We default to IEEE 754 compliance 747; CORTEX-A9-HARD: .eabi_attribute 20, 1 748; CORTEX-A9-HARD: .eabi_attribute 21, 1 749; CORTEX-A9-HARD-NOT: .eabi_attribute 22 750; CORTEX-A9-HARD: .eabi_attribute 23, 3 751; CORTEX-A9-HARD: .eabi_attribute 24, 1 752; CORTEX-A9-HARD: .eabi_attribute 25, 1 753; CORTEX-A9-HARD: .eabi_attribute 28, 1 754; CORTEX-A9-HARD: .eabi_attribute 38, 1 755 756; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 19 757;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when 758;; -ffast-math is specified. 759; CORTEX-A8-HARD-FAST: .eabi_attribute 20, 2 760; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 21 761; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 22 762; CORTEX-A8-HARD-FAST: .eabi_attribute 23, 1 763 764; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19 765;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 766;; -ffast-math is specified. 767; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2 768; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 21 769; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 22 770; CORTEX-A9-HARD-FAST: .eabi_attribute 23, 1 771 772; CORTEX-A12-DEFAULT: .cpu cortex-a12 773; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10 774; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65 775; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1 776; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2 777; CORTEX-A12-DEFAULT: .fpu neon-vfpv4 778; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1 779; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2 780; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3 781; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19 782;; We default to IEEE 754 compliance 783; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1 784; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1 785; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 22 786; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3 787; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1 788; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1 789 790; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19 791;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when 792;; -ffast-math is specified. 793; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2 794; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 21 795; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 22 796; CORTEX-A12-HARD-FAST: .eabi_attribute 23, 1 797 798; CORTEX-A12-NOFPU: .cpu cortex-a12 799; CORTEX-A12-NOFPU: .eabi_attribute 6, 10 800; CORTEX-A12-NOFPU: .eabi_attribute 7, 65 801; CORTEX-A12-NOFPU: .eabi_attribute 8, 1 802; CORTEX-A12-NOFPU: .eabi_attribute 9, 2 803; CORTEX-A12-NOFPU-NOT: .fpu 804; CORTEX-A12-NOFPU: .eabi_attribute 42, 1 805; CORTEX-A12-NOFPU: .eabi_attribute 44, 2 806; CORTEX-A12-NOFPU: .eabi_attribute 68, 3 807; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19 808;; We default to IEEE 754 compliance 809; CORTEX-A12-NOFPU: .eabi_attribute 20, 1 810; CORTEX-A12-NOFPU: .eabi_attribute 21, 1 811; CORTEX-A12-NOFPU-NOT: .eabi_attribute 22 812; CORTEX-A12-NOFPU: .eabi_attribute 23, 3 813; CORTEX-A12-NOFPU: .eabi_attribute 24, 1 814; CORTEX-A12-NOFPU: .eabi_attribute 25, 1 815 816; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19 817;; Despite there being no FPU, we chose to flush to zero preserving 818;; sign. This matches what the hardware would do for this architecture 819;; revision. 820; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2 821; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 21 822; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 22 823; CORTEX-A12-NOFPU-FAST: .eabi_attribute 23, 1 824 825; CORTEX-A15: .cpu cortex-a15 826; CORTEX-A15: .eabi_attribute 6, 10 827; CORTEX-A15: .eabi_attribute 7, 65 828; CORTEX-A15: .eabi_attribute 8, 1 829; CORTEX-A15: .eabi_attribute 9, 2 830; CORTEX-A15: .fpu neon-vfpv4 831; CORTEX-A15-NOT: .eabi_attribute 27 832; CORTEX-A15: .eabi_attribute 36, 1 833; CORTEX-A15: .eabi_attribute 42, 1 834; CORTEX-A15: .eabi_attribute 44, 2 835; CORTEX-A15: .eabi_attribute 68, 3 836; CORTEX-A15-NOT: .eabi_attribute 19 837;; We default to IEEE 754 compliance 838; CORTEX-A15: .eabi_attribute 20, 1 839; CORTEX-A15: .eabi_attribute 21, 1 840; CORTEX-A15-NOT: .eabi_attribute 22 841; CORTEX-A15: .eabi_attribute 23, 3 842; CORTEX-A15: .eabi_attribute 24, 1 843; CORTEX-A15: .eabi_attribute 25, 1 844; CORTEX-A15-NOT: .eabi_attribute 28 845; CORTEX-A15: .eabi_attribute 38, 1 846 847; CORTEX-A15-FAST-NOT: .eabi_attribute 19 848;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when 849;; -ffast-math is specified. 850; CORTEX-A15-FAST: .eabi_attribute 20, 2 851; CORTEX-A15-FAST-NOT: .eabi_attribute 21 852; CORTEX-A15-FAST-NOT: .eabi_attribute 22 853; CORTEX-A15-FAST: .eabi_attribute 23, 1 854 855; CORTEX-A17-DEFAULT: .cpu cortex-a17 856; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10 857; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65 858; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1 859; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2 860; CORTEX-A17-DEFAULT: .fpu neon-vfpv4 861; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1 862; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2 863; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3 864; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19 865;; We default to IEEE 754 compliance 866; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1 867; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1 868; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 22 869; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3 870; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1 871; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1 872 873; CORTEX-A17-FAST-NOT: .eabi_attribute 19 874;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when 875;; -ffast-math is specified. 876; CORTEX-A17-FAST: .eabi_attribute 20, 2 877; CORTEX-A17-FAST-NOT: .eabi_attribute 21 878; CORTEX-A17-FAST-NOT: .eabi_attribute 22 879; CORTEX-A17-FAST: .eabi_attribute 23, 1 880 881; CORTEX-A17-NOFPU: .cpu cortex-a17 882; CORTEX-A17-NOFPU: .eabi_attribute 6, 10 883; CORTEX-A17-NOFPU: .eabi_attribute 7, 65 884; CORTEX-A17-NOFPU: .eabi_attribute 8, 1 885; CORTEX-A17-NOFPU: .eabi_attribute 9, 2 886; CORTEX-A17-NOFPU-NOT: .fpu 887; CORTEX-A17-NOFPU: .eabi_attribute 42, 1 888; CORTEX-A17-NOFPU: .eabi_attribute 44, 2 889; CORTEX-A17-NOFPU: .eabi_attribute 68, 3 890; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 891;; We default to IEEE 754 compliance 892; CORTEX-A17-NOFPU: .eabi_attribute 20, 1 893; CORTEX-A17-NOFPU: .eabi_attribute 21, 1 894; CORTEX-A17-NOFPU-NOT: .eabi_attribute 22 895; CORTEX-A17-NOFPU: .eabi_attribute 23, 3 896; CORTEX-A17-NOFPU: .eabi_attribute 24, 1 897; CORTEX-A17-NOFPU: .eabi_attribute 25, 1 898 899; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 900;; Despite there being no FPU, we chose to flush to zero preserving 901;; sign. This matches what the hardware would do for this architecture 902;; revision. 903; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2 904; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 21 905; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 22 906; CORTEX-A17-NOFPU-FAST: .eabi_attribute 23, 1 907 908; Test flags -enable-no-trapping-fp-math and -denormal-fp-math: 909; NO-TRAPPING-MATH: .eabi_attribute 21, 0 910; DENORMAL-IEEE: .eabi_attribute 20, 1 911; DENORMAL-PRESERVE-SIGN: .eabi_attribute 20, 2 912; DENORMAL-POSITIVE-ZERO: .eabi_attribute 20, 0 913 914; CORTEX-M0: .cpu cortex-m0 915; CORTEX-M0: .eabi_attribute 6, 12 916; CORTEX-M0: .eabi_attribute 7, 77 917; CORTEX-M0: .eabi_attribute 8, 0 918; CORTEX-M0: .eabi_attribute 9, 1 919; CORTEX-M0-NOT: .eabi_attribute 27 920; CORTEX-M0-NOT: .eabi_attribute 36 921; CORTEX-M0: .eabi_attribute 34, 0 922; CORTEX-M0-NOT: .eabi_attribute 42 923; CORTEX-M0-NOT: .eabi_attribute 44 924; CORTEX-M0-NOT: .eabi_attribute 68 925; CORTEX-M0-NOT: .eabi_attribute 19 926;; We default to IEEE 754 compliance 927; CORTEX-M0: .eabi_attribute 20, 1 928; CORTEX-M0: .eabi_attribute 21, 1 929; CORTEX-M0-NOT: .eabi_attribute 22 930; CORTEX-M0: .eabi_attribute 23, 3 931; CORTEX-M0: .eabi_attribute 24, 1 932; CORTEX-M0: .eabi_attribute 25, 1 933; CORTEX-M0-NOT: .eabi_attribute 28 934; CORTEX-M0: .eabi_attribute 38, 1 935 936; CORTEX-M0-FAST-NOT: .eabi_attribute 19 937;; Despite the M0 CPU having no FPU in this scenario, we chose to 938;; flush to positive zero here. There's no hardware support doing 939;; this, but the fast maths software library might and such behaviour 940;; would match hardware support on this architecture revision if it 941;; existed. 942; CORTEX-M0-FAST-NOT: .eabi_attribute 20 943; CORTEX-M0-FAST-NOT: .eabi_attribute 21 944; CORTEX-M0-FAST-NOT: .eabi_attribute 22 945; CORTEX-M0-FAST: .eabi_attribute 23, 1 946 947; CORTEX-M0PLUS: .cpu cortex-m0plus 948; CORTEX-M0PLUS: .eabi_attribute 6, 12 949; CORTEX-M0PLUS: .eabi_attribute 7, 77 950; CORTEX-M0PLUS: .eabi_attribute 8, 0 951; CORTEX-M0PLUS: .eabi_attribute 9, 1 952; CORTEX-M0PLUS-NOT: .eabi_attribute 27 953; CORTEX-M0PLUS-NOT: .eabi_attribute 36 954; CORTEX-M0PLUS-NOT: .eabi_attribute 42 955; CORTEX-M0PLUS-NOT: .eabi_attribute 44 956; CORTEX-M0PLUS-NOT: .eabi_attribute 68 957; CORTEX-M0PLUS-NOT: .eabi_attribute 19 958;; We default to IEEE 754 compliance 959; CORTEX-M0PLUS: .eabi_attribute 20, 1 960; CORTEX-M0PLUS: .eabi_attribute 21, 1 961; CORTEX-M0PLUS-NOT: .eabi_attribute 22 962; CORTEX-M0PLUS: .eabi_attribute 23, 3 963; CORTEX-M0PLUS: .eabi_attribute 24, 1 964; CORTEX-M0PLUS: .eabi_attribute 25, 1 965; CORTEX-M0PLUS-NOT: .eabi_attribute 28 966; CORTEX-M0PLUS: .eabi_attribute 38, 1 967 968; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19 969;; Despite the M0+ CPU having no FPU in this scenario, we chose to 970;; flush to positive zero here. There's no hardware support doing 971;; this, but the fast maths software library might and such behaviour 972;; would match hardware support on this architecture revision if it 973;; existed. 974; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20 975; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21 976; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22 977; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1 978 979; CORTEX-M1: .cpu cortex-m1 980; CORTEX-M1: .eabi_attribute 6, 12 981; CORTEX-M1: .eabi_attribute 7, 77 982; CORTEX-M1: .eabi_attribute 8, 0 983; CORTEX-M1: .eabi_attribute 9, 1 984; CORTEX-M1-NOT: .eabi_attribute 27 985; CORTEX-M1-NOT: .eabi_attribute 36 986; CORTEX-M1-NOT: .eabi_attribute 42 987; CORTEX-M1-NOT: .eabi_attribute 44 988; CORTEX-M1-NOT: .eabi_attribute 68 989; CORTEX-M1-NOT: .eabi_attribute 19 990;; We default to IEEE 754 compliance 991; CORTEX-M1: .eabi_attribute 20, 1 992; CORTEX-M1: .eabi_attribute 21, 1 993; CORTEX-M1-NOT: .eabi_attribute 22 994; CORTEX-M1: .eabi_attribute 23, 3 995; CORTEX-M1: .eabi_attribute 24, 1 996; CORTEX-M1: .eabi_attribute 25, 1 997; CORTEX-M1-NOT: .eabi_attribute 28 998; CORTEX-M1: .eabi_attribute 38, 1 999 1000; CORTEX-M1-FAST-NOT: .eabi_attribute 19 1001;; Despite the M1 CPU having no FPU in this scenario, we chose to 1002;; flush to positive zero here. There's no hardware support doing 1003;; this, but the fast maths software library might and such behaviour 1004;; would match hardware support on this architecture revision if it 1005;; existed. 1006; CORTEX-M1-FAST-NOT: .eabi_attribute 20 1007; CORTEX-M1-FAST-NOT: .eabi_attribute 21 1008; CORTEX-M1-FAST-NOT: .eabi_attribute 22 1009; CORTEX-M1-FAST: .eabi_attribute 23, 1 1010 1011; SC000: .cpu sc000 1012; SC000: .eabi_attribute 6, 12 1013; SC000: .eabi_attribute 7, 77 1014; SC000: .eabi_attribute 8, 0 1015; SC000: .eabi_attribute 9, 1 1016; SC000-NOT: .eabi_attribute 27 1017; SC000-NOT: .eabi_attribute 42 1018; SC000-NOT: .eabi_attribute 44 1019; SC000-NOT: .eabi_attribute 68 1020; SC000-NOT: .eabi_attribute 19 1021;; We default to IEEE 754 compliance 1022; SC000: .eabi_attribute 20, 1 1023; SC000: .eabi_attribute 21, 1 1024; SC000-NOT: .eabi_attribute 22 1025; SC000: .eabi_attribute 23, 3 1026; SC000: .eabi_attribute 24, 1 1027; SC000: .eabi_attribute 25, 1 1028; SC000-NOT: .eabi_attribute 28 1029; SC000: .eabi_attribute 38, 1 1030 1031; SC000-FAST-NOT: .eabi_attribute 19 1032;; Despite the SC000 CPU having no FPU in this scenario, we chose to 1033;; flush to positive zero here. There's no hardware support doing 1034;; this, but the fast maths software library might and such behaviour 1035;; would match hardware support on this architecture revision if it 1036;; existed. 1037; SC000-FAST-NOT: .eabi_attribute 20 1038; SC000-FAST-NOT: .eabi_attribute 21 1039; SC000-FAST-NOT: .eabi_attribute 22 1040; SC000-FAST: .eabi_attribute 23, 1 1041 1042; CORTEX-M3: .cpu cortex-m3 1043; CORTEX-M3: .eabi_attribute 6, 10 1044; CORTEX-M3: .eabi_attribute 7, 77 1045; CORTEX-M3: .eabi_attribute 8, 0 1046; CORTEX-M3: .eabi_attribute 9, 2 1047; CORTEX-M3-NOT: .eabi_attribute 27 1048; CORTEX-M3-NOT: .eabi_attribute 36 1049; CORTEX-M3-NOT: .eabi_attribute 42 1050; CORTEX-M3-NOT: .eabi_attribute 44 1051; CORTEX-M3-NOT: .eabi_attribute 68 1052; CORTEX-M3-NOT: .eabi_attribute 19 1053;; We default to IEEE 754 compliance 1054; CORTEX-M3: .eabi_attribute 20, 1 1055; CORTEX-M3: .eabi_attribute 21, 1 1056; CORTEX-M3-NOT: .eabi_attribute 22 1057; CORTEX-M3: .eabi_attribute 23, 3 1058; CORTEX-M3: .eabi_attribute 24, 1 1059; CORTEX-M3: .eabi_attribute 25, 1 1060; CORTEX-M3-NOT: .eabi_attribute 28 1061; CORTEX-M3: .eabi_attribute 38, 1 1062 1063; CORTEX-M3-FAST-NOT: .eabi_attribute 19 1064;; Despite there being no FPU, we chose to flush to zero preserving 1065;; sign. This matches what the hardware would do for this architecture 1066;; revision. 1067; CORTEX-M3-FAST: .eabi_attribute 20, 2 1068; CORTEX-M3-FAST-NOT: .eabi_attribute 21 1069; CORTEX-M3-FAST-NOT: .eabi_attribute 22 1070; CORTEX-M3-FAST: .eabi_attribute 23, 1 1071 1072; SC300: .cpu sc300 1073; SC300: .eabi_attribute 6, 10 1074; SC300: .eabi_attribute 7, 77 1075; SC300: .eabi_attribute 8, 0 1076; SC300: .eabi_attribute 9, 2 1077; SC300-NOT: .eabi_attribute 27 1078; SC300-NOT: .eabi_attribute 36 1079; SC300-NOT: .eabi_attribute 42 1080; SC300-NOT: .eabi_attribute 44 1081; SC300-NOT: .eabi_attribute 68 1082; SC300-NOT: .eabi_attribute 19 1083;; We default to IEEE 754 compliance 1084; SC300: .eabi_attribute 20, 1 1085; SC300: .eabi_attribute 21, 1 1086; SC300-NOT: .eabi_attribute 22 1087; SC300: .eabi_attribute 23, 3 1088; SC300: .eabi_attribute 24, 1 1089; SC300: .eabi_attribute 25, 1 1090; SC300-NOT: .eabi_attribute 28 1091; SC300: .eabi_attribute 38, 1 1092 1093; SC300-FAST-NOT: .eabi_attribute 19 1094;; Despite there being no FPU, we chose to flush to zero preserving 1095;; sign. This matches what the hardware would do for this architecture 1096;; revision. 1097; SC300-FAST: .eabi_attribute 20, 2 1098; SC300-FAST-NOT: .eabi_attribute 21 1099; SC300-FAST-NOT: .eabi_attribute 22 1100; SC300-FAST: .eabi_attribute 23, 1 1101 1102; CORTEX-M4-SOFT: .cpu cortex-m4 1103; CORTEX-M4-SOFT: .eabi_attribute 6, 13 1104; CORTEX-M4-SOFT: .eabi_attribute 7, 77 1105; CORTEX-M4-SOFT: .eabi_attribute 8, 0 1106; CORTEX-M4-SOFT: .eabi_attribute 9, 2 1107; CORTEX-M4-SOFT: .fpu fpv4-sp-d16 1108; CORTEX-M4-SOFT: .eabi_attribute 27, 1 1109; CORTEX-M4-SOFT: .eabi_attribute 36, 1 1110; CORTEX-M4-SOFT-NOT: .eabi_attribute 42 1111; CORTEX-M4-SOFT-NOT: .eabi_attribute 44 1112; CORTEX-M4-SOFT-NOT: .eabi_attribute 68 1113; CORTEX-M4-SOFT-NOT: .eabi_attribute 19 1114;; We default to IEEE 754 compliance 1115; CORTEX-M4-SOFT: .eabi_attribute 20, 1 1116; CORTEX-M4-SOFT: .eabi_attribute 21, 1 1117; CORTEX-M4-SOFT-NOT: .eabi_attribute 22 1118; CORTEX-M4-SOFT: .eabi_attribute 23, 3 1119; CORTEX-M4-SOFT: .eabi_attribute 24, 1 1120; CORTEX-M4-SOFT: .eabi_attribute 25, 1 1121; CORTEX-M4-SOFT-NOT: .eabi_attribute 28 1122; CORTEX-M4-SOFT: .eabi_attribute 38, 1 1123 1124; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19 1125;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1126;; -ffast-math is specified. 1127; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2 1128; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21 1129; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22 1130; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1 1131 1132; CORTEX-M4-HARD: .cpu cortex-m4 1133; CORTEX-M4-HARD: .eabi_attribute 6, 13 1134; CORTEX-M4-HARD: .eabi_attribute 7, 77 1135; CORTEX-M4-HARD: .eabi_attribute 8, 0 1136; CORTEX-M4-HARD: .eabi_attribute 9, 2 1137; CORTEX-M4-HARD: .fpu fpv4-sp-d16 1138; CORTEX-M4-HARD: .eabi_attribute 27, 1 1139; CORTEX-M4-HARD: .eabi_attribute 36, 1 1140; CORTEX-M4-HARD-NOT: .eabi_attribute 42 1141; CORTEX-M4-HARD-NOT: .eabi_attribute 44 1142; CORTEX-M4-HARD-NOT: .eabi_attribute 68 1143; CORTEX-M4-HARD-NOT: .eabi_attribute 19 1144;; We default to IEEE 754 compliance 1145; CORTEX-M4-HARD: .eabi_attribute 20, 1 1146; CORTEX-M4-HARD: .eabi_attribute 21, 1 1147; CORTEX-M4-HARD-NOT: .eabi_attribute 22 1148; CORTEX-M4-HARD: .eabi_attribute 23, 3 1149; CORTEX-M4-HARD: .eabi_attribute 24, 1 1150; CORTEX-M4-HARD: .eabi_attribute 25, 1 1151; CORTEX-M4-HARD: .eabi_attribute 28, 1 1152; CORTEX-M4-HARD: .eabi_attribute 38, 1 1153 1154; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19 1155;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1156;; -ffast-math is specified. 1157; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2 1158; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21 1159; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22 1160; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1 1161 1162; CORTEX-M7: .cpu cortex-m7 1163; CORTEX-M7: .eabi_attribute 6, 13 1164; CORTEX-M7: .eabi_attribute 7, 77 1165; CORTEX-M7: .eabi_attribute 8, 0 1166; CORTEX-M7: .eabi_attribute 9, 2 1167; CORTEX-M7-SOFT-NOT: .fpu 1168; CORTEX-M7-SINGLE: .fpu fpv5-sp-d16 1169; CORTEX-M7-DOUBLE: .fpu fpv5-d16 1170; CORTEX-M7-SOFT-NOT: .eabi_attribute 27 1171; CORTEX-M7-SINGLE: .eabi_attribute 27, 1 1172; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27 1173; CORTEX-M7: .eabi_attribute 36, 1 1174; CORTEX-M7-NOT: .eabi_attribute 44 1175; CORTEX-M7: .eabi_attribute 17, 1 1176; CORTEX-M7-NOT: .eabi_attribute 19 1177;; We default to IEEE 754 compliance 1178; CORTEX-M7: .eabi_attribute 20, 1 1179; CORTEX-M7: .eabi_attribute 21, 1 1180; CORTEX-M7-NOT: .eabi_attribute 22 1181; CORTEX-M7: .eabi_attribute 23, 3 1182; CORTEX-M7: .eabi_attribute 24, 1 1183; CORTEX-M7: .eabi_attribute 25, 1 1184; CORTEX-M7: .eabi_attribute 38, 1 1185; CORTEX-M7: .eabi_attribute 14, 0 1186 1187; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19 1188;; The M7 has the ARMv8 FP unit, which always flushes preserving sign. 1189; CORTEX-M7-FAST: .eabi_attribute 20, 2 1190;; Despite there being no FPU, we chose to flush to zero preserving 1191;; sign. This matches what the hardware would do for this architecture 1192;; revision. 1193; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2 1194; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 21 1195; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22 1196; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1 1197 1198; CORTEX-R4: .cpu cortex-r4 1199; CORTEX-R4: .eabi_attribute 6, 10 1200; CORTEX-R4: .eabi_attribute 7, 82 1201; CORTEX-R4: .eabi_attribute 8, 1 1202; CORTEX-R4: .eabi_attribute 9, 2 1203; CORTEX-R4-NOT: .fpu vfpv3-d16 1204; CORTEX-R4-NOT: .eabi_attribute 36 1205; CORTEX-R4-NOT: .eabi_attribute 42 1206; CORTEX-R4-NOT: .eabi_attribute 44 1207; CORTEX-R4-NOT: .eabi_attribute 68 1208; CORTEX-R4-NOT: .eabi_attribute 19 1209;; We default to IEEE 754 compliance 1210; CORTEX-R4: .eabi_attribute 20, 1 1211; CORTEX-R4: .eabi_attribute 21, 1 1212; CORTEX-R4-NOT: .eabi_attribute 22 1213; CORTEX-R4: .eabi_attribute 23, 3 1214; CORTEX-R4: .eabi_attribute 24, 1 1215; CORTEX-R4: .eabi_attribute 25, 1 1216; CORTEX-R4-NOT: .eabi_attribute 28 1217; CORTEX-R4: .eabi_attribute 38, 1 1218 1219; CORTEX-R4F: .cpu cortex-r4f 1220; CORTEX-R4F: .eabi_attribute 6, 10 1221; CORTEX-R4F: .eabi_attribute 7, 82 1222; CORTEX-R4F: .eabi_attribute 8, 1 1223; CORTEX-R4F: .eabi_attribute 9, 2 1224; CORTEX-R4F: .fpu vfpv3-d16 1225; CORTEX-R4F-NOT: .eabi_attribute 27, 1 1226; CORTEX-R4F-NOT: .eabi_attribute 36 1227; CORTEX-R4F-NOT: .eabi_attribute 42 1228; CORTEX-R4F-NOT: .eabi_attribute 44 1229; CORTEX-R4F-NOT: .eabi_attribute 68 1230; CORTEX-R4F-NOT: .eabi_attribute 19 1231;; We default to IEEE 754 compliance 1232; CORTEX-R4F: .eabi_attribute 20, 1 1233; CORTEX-R4F: .eabi_attribute 21, 1 1234; CORTEX-R4F-NOT: .eabi_attribute 22 1235; CORTEX-R4F: .eabi_attribute 23, 3 1236; CORTEX-R4F: .eabi_attribute 24, 1 1237; CORTEX-R4F: .eabi_attribute 25, 1 1238; CORTEX-R4F-NOT: .eabi_attribute 28 1239; CORTEX-R4F: .eabi_attribute 38, 1 1240 1241; CORTEX-R5: .cpu cortex-r5 1242; CORTEX-R5: .eabi_attribute 6, 10 1243; CORTEX-R5: .eabi_attribute 7, 82 1244; CORTEX-R5: .eabi_attribute 8, 1 1245; CORTEX-R5: .eabi_attribute 9, 2 1246; CORTEX-R5: .fpu vfpv3-d16 1247; CORTEX-R5-NOT: .eabi_attribute 27, 1 1248; CORTEX-R5-NOT: .eabi_attribute 36 1249; CORTEX-R5: .eabi_attribute 44, 2 1250; CORTEX-R5-NOT: .eabi_attribute 42 1251; CORTEX-R5-NOT: .eabi_attribute 68 1252; CORTEX-R5-NOT: .eabi_attribute 19 1253;; We default to IEEE 754 compliance 1254; CORTEX-R5: .eabi_attribute 20, 1 1255; CORTEX-R5: .eabi_attribute 21, 1 1256; CORTEX-R5-NOT: .eabi_attribute 22 1257; CORTEX-R5: .eabi_attribute 23, 3 1258; CORTEX-R5: .eabi_attribute 24, 1 1259; CORTEX-R5: .eabi_attribute 25, 1 1260; CORTEX-R5-NOT: .eabi_attribute 28 1261; CORTEX-R5: .eabi_attribute 38, 1 1262 1263; CORTEX-R5-FAST-NOT: .eabi_attribute 19 1264;; The R5 has the VFPv3 FP unit, which always flushes preserving sign. 1265; CORTEX-R5-FAST: .eabi_attribute 20, 2 1266; CORTEX-R5-FAST-NOT: .eabi_attribute 21 1267; CORTEX-R5-FAST-NOT: .eabi_attribute 22 1268; CORTEX-R5-FAST: .eabi_attribute 23, 1 1269 1270; CORTEX-R7: .cpu cortex-r7 1271; CORTEX-R7: .eabi_attribute 6, 10 1272; CORTEX-R7: .eabi_attribute 7, 82 1273; CORTEX-R7: .eabi_attribute 8, 1 1274; CORTEX-R7: .eabi_attribute 9, 2 1275; CORTEX-R7: .fpu vfpv3-d16-fp16 1276; CORTEX-R7: .eabi_attribute 36, 1 1277; CORTEX-R7: .eabi_attribute 42, 1 1278; CORTEX-R7: .eabi_attribute 44, 2 1279; CORTEX-R7-NOT: .eabi_attribute 68 1280; CORTEX-R7-NOT: .eabi_attribute 19 1281;; We default to IEEE 754 compliance 1282; CORTEX-R7: .eabi_attribute 20, 1 1283; CORTEX-R7: .eabi_attribute 21, 1 1284; CORTEX-R7-NOT: .eabi_attribute 22 1285; CORTEX-R7: .eabi_attribute 23, 3 1286; CORTEX-R7: .eabi_attribute 24, 1 1287; CORTEX-R7: .eabi_attribute 25, 1 1288; CORTEX-R7-NOT: .eabi_attribute 28 1289; CORTEX-R7: .eabi_attribute 38, 1 1290 1291; CORTEX-R7-FAST-NOT: .eabi_attribute 19 1292;; The R7 has the VFPv3 FP unit, which always flushes preserving sign. 1293; CORTEX-R7-FAST: .eabi_attribute 20, 2 1294; CORTEX-R7-FAST-NOT: .eabi_attribute 21 1295; CORTEX-R7-FAST-NOT: .eabi_attribute 22 1296; CORTEX-R7-FAST: .eabi_attribute 23, 1 1297 1298; CORTEX-R8: .cpu cortex-r8 1299; CORTEX-R8: .eabi_attribute 6, 10 1300; CORTEX-R8: .eabi_attribute 7, 82 1301; CORTEX-R8: .eabi_attribute 8, 1 1302; CORTEX-R8: .eabi_attribute 9, 2 1303; CORTEX-R8: .fpu vfpv3-d16-fp16 1304; CORTEX-R8: .eabi_attribute 36, 1 1305; CORTEX-R8: .eabi_attribute 42, 1 1306; CORTEX-R8: .eabi_attribute 44, 2 1307; CORTEX-R8-NOT: .eabi_attribute 68 1308; CORTEX-R8-NOT: .eabi_attribute 19 1309;; We default to IEEE 754 compliance 1310; CORTEX-R8: .eabi_attribute 20, 1 1311; CORTEX-R8: .eabi_attribute 21, 1 1312; CORTEX-R8-NOT: .eabi_attribute 22 1313; CORTEX-R8: .eabi_attribute 23, 3 1314; CORTEX-R8: .eabi_attribute 24, 1 1315; CORTEX-R8: .eabi_attribute 25, 1 1316; CORTEX-R8-NOT: .eabi_attribute 28 1317; CORTEX-R8: .eabi_attribute 38, 1 1318 1319; CORTEX-R8-FAST-NOT: .eabi_attribute 19 1320;; The R8 has the VFPv3 FP unit, which always flushes preserving sign. 1321; CORTEX-R8-FAST: .eabi_attribute 20, 2 1322; CORTEX-R8-FAST-NOT: .eabi_attribute 21 1323; CORTEX-R8-FAST-NOT: .eabi_attribute 22 1324; CORTEX-R8-FAST: .eabi_attribute 23, 1 1325 1326; CORTEX-A32: .cpu cortex-a32 1327; CORTEX-A32: .eabi_attribute 6, 14 1328; CORTEX-A32: .eabi_attribute 7, 65 1329; CORTEX-A32: .eabi_attribute 8, 1 1330; CORTEX-A32: .eabi_attribute 9, 2 1331; CORTEX-A32: .fpu crypto-neon-fp-armv8 1332; CORTEX-A32: .eabi_attribute 12, 3 1333; CORTEX-A32-NOT: .eabi_attribute 27 1334; CORTEX-A32: .eabi_attribute 36, 1 1335; CORTEX-A32: .eabi_attribute 42, 1 1336; CORTEX-A32-NOT: .eabi_attribute 44 1337; CORTEX-A32: .eabi_attribute 68, 3 1338; CORTEX-A32-NOT: .eabi_attribute 19 1339;; We default to IEEE 754 compliance 1340; CORTEX-A32: .eabi_attribute 20, 1 1341; CORTEX-A32: .eabi_attribute 21, 1 1342; CORTEX-A32-NOT: .eabi_attribute 22 1343; CORTEX-A32: .eabi_attribute 23, 3 1344; CORTEX-A32: .eabi_attribute 24, 1 1345; CORTEX-A32: .eabi_attribute 25, 1 1346; CORTEX-A32-NOT: .eabi_attribute 28 1347; CORTEX-A32: .eabi_attribute 38, 1 1348 1349; CORTEX-A32-FAST-NOT: .eabi_attribute 19 1350;; The A32 has the ARMv8 FP unit, which always flushes preserving sign. 1351; CORTEX-A32-FAST: .eabi_attribute 20, 2 1352; CORTEX-A32-FAST-NOT: .eabi_attribute 21 1353; CORTEX-A32-FAST-NOT: .eabi_attribute 22 1354; CORTEX-A32-FAST: .eabi_attribute 23, 1 1355 1356; CORTEX-M23: .cpu cortex-m23 1357; CORTEX-M23: .eabi_attribute 6, 16 1358; CORTEX-M23: .eabi_attribute 7, 77 1359; CORTEX-M23: .eabi_attribute 8, 0 1360; CORTEX-M23: .eabi_attribute 9, 3 1361; CORTEX-M23-NOT: .eabi_attribute 27 1362; CORTEX-M23: .eabi_attribute 34, 0 1363; CORTEX-M23-NOT: .eabi_attribute 44 1364; CORTEX-M23: .eabi_attribute 17, 1 1365;; We default to IEEE 754 compliance 1366; CORTEX-M23-NOT: .eabi_attribute 19 1367; CORTEX-M23: .eabi_attribute 20, 1 1368; CORTEX-M23: .eabi_attribute 21, 1 1369; CORTEX-M23: .eabi_attribute 23, 3 1370; CORTEX-M23: .eabi_attribute 24, 1 1371; CORTEX-M23-NOT: .eabi_attribute 28 1372; CORTEX-M23: .eabi_attribute 25, 1 1373; CORTEX-M23: .eabi_attribute 38, 1 1374; CORTEX-M23: .eabi_attribute 14, 0 1375 1376; CORTEX-M33: .cpu cortex-m33 1377; CORTEX-M33: .eabi_attribute 6, 17 1378; CORTEX-M33: .eabi_attribute 7, 77 1379; CORTEX-M33: .eabi_attribute 8, 0 1380; CORTEX-M33: .eabi_attribute 9, 3 1381; CORTEX-M33: .fpu fpv5-sp-d16 1382; CORTEX-M33: .eabi_attribute 27, 1 1383; CORTEX-M33: .eabi_attribute 36, 1 1384; CORTEX-M33-NOT: .eabi_attribute 44 1385; CORTEX-M33: .eabi_attribute 46, 1 1386; CORTEX-M33: .eabi_attribute 34, 1 1387; CORTEX-M33: .eabi_attribute 17, 1 1388;; We default to IEEE 754 compliance 1389; CORTEX-M23-NOT: .eabi_attribute 19 1390; CORTEX-M33: .eabi_attribute 20, 1 1391; CORTEX-M33: .eabi_attribute 21, 1 1392; CORTEX-M33: .eabi_attribute 23, 3 1393; CORTEX-M33: .eabi_attribute 24, 1 1394; CORTEX-M33: .eabi_attribute 25, 1 1395; CORTEX-M33-NOT: .eabi_attribute 28 1396; CORTEX-M33: .eabi_attribute 38, 1 1397; CORTEX-M33: .eabi_attribute 14, 0 1398 1399; CORTEX-M35P: .cpu cortex-m35p 1400; CORTEX-M35P: .eabi_attribute 6, 17 1401; CORTEX-M35P: .eabi_attribute 7, 77 1402; CORTEX-M35P: .eabi_attribute 8, 0 1403; CORTEX-M35P: .eabi_attribute 9, 3 1404; CORTEX-M35P: .fpu fpv5-sp-d16 1405; CORTEX-M35P: .eabi_attribute 27, 1 1406; CORTEX-M35P: .eabi_attribute 36, 1 1407; CORTEX-M35P-NOT: .eabi_attribute 44 1408; CORTEX-M35P: .eabi_attribute 46, 1 1409; CORTEX-M35P: .eabi_attribute 34, 1 1410; CORTEX-M35P: .eabi_attribute 17, 1 1411; CORTEX-M35P: .eabi_attribute 20, 1 1412; CORTEX-M35P: .eabi_attribute 21, 1 1413; CORTEX-M35P: .eabi_attribute 23, 3 1414; CORTEX-M35P: .eabi_attribute 24, 1 1415; CORTEX-M35P: .eabi_attribute 25, 1 1416; CORTEX-M35P-NOT: .eabi_attribute 28 1417; CORTEX-M35P: .eabi_attribute 38, 1 1418; CORTEX-M35P: .eabi_attribute 14, 0 1419 1420; CORTEX-M33-FAST-NOT: .eabi_attribute 19 1421; CORTEX-M33-FAST: .eabi_attribute 20, 2 1422; CORTEX-M33-FAST-NOT: .eabi_attribute 21 1423; CORTEX-M33-FAST-NOT: .eabi_attribute 22 1424; CORTEX-M33-FAST: .eabi_attribute 23, 1 1425 1426; CORTEX-A35: .cpu cortex-a35 1427; CORTEX-A35: .eabi_attribute 6, 14 1428; CORTEX-A35: .eabi_attribute 7, 65 1429; CORTEX-A35: .eabi_attribute 8, 1 1430; CORTEX-A35: .eabi_attribute 9, 2 1431; CORTEX-A35: .fpu crypto-neon-fp-armv8 1432; CORTEX-A35: .eabi_attribute 12, 3 1433; CORTEX-A35-NOT: .eabi_attribute 27 1434; CORTEX-A35: .eabi_attribute 36, 1 1435; CORTEX-A35: .eabi_attribute 42, 1 1436; CORTEX-A35-NOT: .eabi_attribute 44 1437; CORTEX-A35: .eabi_attribute 68, 3 1438; CORTEX-A35-NOT: .eabi_attribute 19 1439;; We default to IEEE 754 compliance 1440; CORTEX-A35: .eabi_attribute 20, 1 1441; CORTEX-A35: .eabi_attribute 21, 1 1442; CORTEX-A35-NOT: .eabi_attribute 22 1443; CORTEX-A35: .eabi_attribute 23, 3 1444; CORTEX-A35: .eabi_attribute 24, 1 1445; CORTEX-A35: .eabi_attribute 25, 1 1446; CORTEX-A35-NOT: .eabi_attribute 28 1447; CORTEX-A35: .eabi_attribute 38, 1 1448 1449; CORTEX-A35-FAST-NOT: .eabi_attribute 19 1450;; The A35 has the ARMv8 FP unit, which always flushes preserving sign. 1451; CORTEX-A35-FAST: .eabi_attribute 20, 2 1452; CORTEX-A35-FAST-NOT: .eabi_attribute 21 1453; CORTEX-A35-FAST-NOT: .eabi_attribute 22 1454; CORTEX-A35-FAST: .eabi_attribute 23, 1 1455 1456; CORTEX-A53: .cpu cortex-a53 1457; CORTEX-A53: .eabi_attribute 6, 14 1458; CORTEX-A53: .eabi_attribute 7, 65 1459; CORTEX-A53: .eabi_attribute 8, 1 1460; CORTEX-A53: .eabi_attribute 9, 2 1461; CORTEX-A53: .fpu crypto-neon-fp-armv8 1462; CORTEX-A53: .eabi_attribute 12, 3 1463; CORTEX-A53-NOT: .eabi_attribute 27 1464; CORTEX-A53: .eabi_attribute 36, 1 1465; CORTEX-A53: .eabi_attribute 42, 1 1466; CORTEX-A53-NOT: .eabi_attribute 44 1467; CORTEX-A53: .eabi_attribute 68, 3 1468; CORTEX-A53-NOT: .eabi_attribute 19 1469;; We default to IEEE 754 compliance 1470; CORTEX-A53: .eabi_attribute 20, 1 1471; CORTEX-A53: .eabi_attribute 21, 1 1472; CORTEX-A53-NOT: .eabi_attribute 22 1473; CORTEX-A53: .eabi_attribute 23, 3 1474; CORTEX-A53: .eabi_attribute 24, 1 1475; CORTEX-A53: .eabi_attribute 25, 1 1476; CORTEX-A53-NOT: .eabi_attribute 28 1477; CORTEX-A53: .eabi_attribute 38, 1 1478 1479; CORTEX-A53-FAST-NOT: .eabi_attribute 19 1480;; The A53 has the ARMv8 FP unit, which always flushes preserving sign. 1481; CORTEX-A53-FAST: .eabi_attribute 20, 2 1482; CORTEX-A53-FAST-NOT: .eabi_attribute 21 1483; CORTEX-A53-FAST-NOT: .eabi_attribute 22 1484; CORTEX-A53-FAST: .eabi_attribute 23, 1 1485 1486; CORTEX-A57: .cpu cortex-a57 1487; CORTEX-A57: .eabi_attribute 6, 14 1488; CORTEX-A57: .eabi_attribute 7, 65 1489; CORTEX-A57: .eabi_attribute 8, 1 1490; CORTEX-A57: .eabi_attribute 9, 2 1491; CORTEX-A57: .fpu crypto-neon-fp-armv8 1492; CORTEX-A57: .eabi_attribute 12, 3 1493; CORTEX-A57-NOT: .eabi_attribute 27 1494; CORTEX-A57: .eabi_attribute 36, 1 1495; CORTEX-A57: .eabi_attribute 42, 1 1496; CORTEX-A57-NOT: .eabi_attribute 44 1497; CORTEX-A57: .eabi_attribute 68, 3 1498; CORTEX-A57-NOT: .eabi_attribute 19 1499;; We default to IEEE 754 compliance 1500; CORTEX-A57: .eabi_attribute 20, 1 1501; CORTEX-A57: .eabi_attribute 21, 1 1502; CORTEX-A57-NOT: .eabi_attribute 22 1503; CORTEX-A57: .eabi_attribute 23, 3 1504; CORTEX-A57: .eabi_attribute 24, 1 1505; CORTEX-A57: .eabi_attribute 25, 1 1506; CORTEX-A57-NOT: .eabi_attribute 28 1507; CORTEX-A57: .eabi_attribute 38, 1 1508 1509; CORTEX-A57-FAST-NOT: .eabi_attribute 19 1510;; The A57 has the ARMv8 FP unit, which always flushes preserving sign. 1511; CORTEX-A57-FAST: .eabi_attribute 20, 2 1512; CORTEX-A57-FAST-NOT: .eabi_attribute 21 1513; CORTEX-A57-FAST-NOT: .eabi_attribute 22 1514; CORTEX-A57-FAST: .eabi_attribute 23, 1 1515 1516; CORTEX-A72: .cpu cortex-a72 1517; CORTEX-A72: .eabi_attribute 6, 14 1518; CORTEX-A72: .eabi_attribute 7, 65 1519; CORTEX-A72: .eabi_attribute 8, 1 1520; CORTEX-A72: .eabi_attribute 9, 2 1521; CORTEX-A72: .fpu crypto-neon-fp-armv8 1522; CORTEX-A72: .eabi_attribute 12, 3 1523; CORTEX-A72-NOT: .eabi_attribute 27 1524; CORTEX-A72: .eabi_attribute 36, 1 1525; CORTEX-A72: .eabi_attribute 42, 1 1526; CORTEX-A72-NOT: .eabi_attribute 44 1527; CORTEX-A72: .eabi_attribute 68, 3 1528; CORTEX-A72-NOT: .eabi_attribute 19 1529;; We default to IEEE 754 compliance 1530; CORTEX-A72: .eabi_attribute 20, 1 1531; CORTEX-A72: .eabi_attribute 21, 1 1532; CORTEX-A72-NOT: .eabi_attribute 22 1533; CORTEX-A72: .eabi_attribute 23, 3 1534; CORTEX-A72: .eabi_attribute 24, 1 1535; CORTEX-A72: .eabi_attribute 25, 1 1536; CORTEX-A72-NOT: .eabi_attribute 28 1537; CORTEX-A72: .eabi_attribute 38, 1 1538 1539; CORTEX-A72-FAST-NOT: .eabi_attribute 19 1540;; The A72 has the ARMv8 FP unit, which always flushes preserving sign. 1541; CORTEX-A72-FAST: .eabi_attribute 20, 2 1542; CORTEX-A72-FAST-NOT: .eabi_attribute 21 1543; CORTEX-A72-FAST-NOT: .eabi_attribute 22 1544; CORTEX-A72-FAST: .eabi_attribute 23, 1 1545 1546; CORTEX-A73: .cpu cortex-a73 1547; CORTEX-A73: .eabi_attribute 6, 14 1548; CORTEX-A73: .eabi_attribute 7, 65 1549; CORTEX-A73: .eabi_attribute 8, 1 1550; CORTEX-A73: .eabi_attribute 9, 2 1551; CORTEX-A73: .fpu crypto-neon-fp-armv8 1552; CORTEX-A73: .eabi_attribute 12, 3 1553; CORTEX-A73-NOT: .eabi_attribute 27 1554; CORTEX-A73: .eabi_attribute 36, 1 1555; CORTEX-A73: .eabi_attribute 42, 1 1556; CORTEX-A73-NOT: .eabi_attribute 44 1557; CORTEX-A73: .eabi_attribute 68, 3 1558; CORTEX-A73-NOT: .eabi_attribute 19 1559;; We default to IEEE 754 compliance 1560; CORTEX-A73: .eabi_attribute 20, 1 1561; CORTEX-A73: .eabi_attribute 21, 1 1562; CORTEX-A73-NOT: .eabi_attribute 22 1563; CORTEX-A73: .eabi_attribute 23, 3 1564; CORTEX-A73: .eabi_attribute 24, 1 1565; CORTEX-A73: .eabi_attribute 25, 1 1566; CORTEX-A73-NOT: .eabi_attribute 28 1567; CORTEX-A73: .eabi_attribute 38, 1 1568; CORTEX-A73: .eabi_attribute 14, 0 1569 1570; EXYNOS-FAST-NOT: .eabi_attribute 19 1571;; The Exynos processors have the ARMv8 FP unit, which always flushes preserving sign. 1572; EXYNOS-FAST: .eabi_attribute 20, 2 1573; EXYNOS-FAST-NOT: .eabi_attribute 21 1574; EXYNOS-FAST-NOT: .eabi_attribute 22 1575; EXYNOS-FAST: .eabi_attribute 23, 1 1576 1577; EXYNOS-M3: .cpu exynos-m3 1578; EXYNOS-M3: .eabi_attribute 6, 14 1579; EXYNOS-M3: .eabi_attribute 7, 65 1580; EXYNOS-M3: .eabi_attribute 8, 1 1581; EXYNOS-M3: .eabi_attribute 9, 2 1582; EXYNOS-M3: .fpu crypto-neon-fp-armv8 1583; EXYNOS-M3: .eabi_attribute 12, 3 1584; EXYNOS-M3-NOT: .eabi_attribute 27 1585; EXYNOS-M3: .eabi_attribute 36, 1 1586; EXYNOS-M3: .eabi_attribute 42, 1 1587; EXYNOS-M3-NOT: .eabi_attribute 44 1588; EXYNOS-M3: .eabi_attribute 68, 3 1589; EXYNOS-M3-NOT: .eabi_attribute 19 1590;; We default to IEEE 754 compliance 1591; EXYNOS-M3: .eabi_attribute 20, 1 1592; EXYNOS-M3: .eabi_attribute 21, 1 1593; EXYNOS-M3-NOT: .eabi_attribute 22 1594; EXYNOS-M3: .eabi_attribute 23, 3 1595; EXYNOS-M3: .eabi_attribute 24, 1 1596; EXYNOS-M3: .eabi_attribute 25, 1 1597; EXYNOS-M3-NOT: .eabi_attribute 28 1598; EXYNOS-M3: .eabi_attribute 38, 1 1599 1600; EXYNOS-M4: .cpu exynos-m4 1601; EXYNOS-M4: .eabi_attribute 6, 14 1602; EXYNOS-M4: .eabi_attribute 7, 65 1603; EXYNOS-M4: .eabi_attribute 8, 1 1604; EXYNOS-M4: .eabi_attribute 9, 2 1605; EXYNOS-M4: .fpu crypto-neon-fp-armv8 1606; EXYNOS-M4: .eabi_attribute 12, 4 1607; EXYNOS-M4-NOT: .eabi_attribute 27 1608; EXYNOS-M4: .eabi_attribute 36, 1 1609; EXYNOS-M4: .eabi_attribute 42, 1 1610; EXYNOS-M4-NOT: .eabi_attribute 44 1611; EXYNOS-M4: .eabi_attribute 68, 3 1612; EXYNOS-M4-NOT: .eabi_attribute 19 1613;; We default to IEEE 754 compliance 1614; EXYNOS-M4: .eabi_attribute 20, 1 1615; EXYNOS-M4: .eabi_attribute 21, 1 1616; EXYNOS-M4-NOT: .eabi_attribute 22 1617; EXYNOS-M4: .eabi_attribute 23, 3 1618; EXYNOS-M4: .eabi_attribute 24, 1 1619; EXYNOS-M4: .eabi_attribute 25, 1 1620; EXYNOS-M4-NOT: .eabi_attribute 28 1621; EXYNOS-M4: .eabi_attribute 38, 1 1622 1623; EXYNOS-M5: .cpu exynos-m5 1624; EXYNOS-M5: .eabi_attribute 6, 14 1625; EXYNOS-M5: .eabi_attribute 7, 65 1626; EXYNOS-M5: .eabi_attribute 8, 1 1627; EXYNOS-M5: .eabi_attribute 9, 2 1628; EXYNOS-M5: .fpu crypto-neon-fp-armv8 1629; EXYNOS-M5: .eabi_attribute 12, 4 1630; EXYNOS-M5-NOT: .eabi_attribute 27 1631; EXYNOS-M5: .eabi_attribute 36, 1 1632; EXYNOS-M5: .eabi_attribute 42, 1 1633; EXYNOS-M5-NOT: .eabi_attribute 44 1634; EXYNOS-M5: .eabi_attribute 68, 3 1635; EXYNOS-M5-NOT: .eabi_attribute 19 1636;; We default to IEEE 754 compliance 1637; EXYNOS-M5: .eabi_attribute 20, 1 1638; EXYNOS-M5: .eabi_attribute 21, 1 1639; EXYNOS-M5-NOT: .eabi_attribute 22 1640; EXYNOS-M5: .eabi_attribute 23, 3 1641; EXYNOS-M5: .eabi_attribute 24, 1 1642; EXYNOS-M5: .eabi_attribute 25, 1 1643; EXYNOS-M5-NOT: .eabi_attribute 28 1644; EXYNOS-M5: .eabi_attribute 38, 1 1645 1646; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16 1647; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16 1648; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd 1649; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16 1650; GENERIC-FPU-NEON-FP16: .fpu neon-fp16 1651 1652; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14 1653; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65 1654; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1 1655; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2 1656; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8 1657; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4 1658; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27 1659; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1 1660; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1 1661; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44 1662; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3 1663; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19 1664;; We default to IEEE 754 compliance 1665; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1 1666; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1 1667; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22 1668; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3 1669; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1 1670; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1 1671; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28 1672; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1 1673 1674; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19 1675;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign. 1676; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2 1677; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21 1678; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22 1679; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1 1680 1681; RELOC-PIC: .eabi_attribute 15, 1 1682; RELOC-PIC: .eabi_attribute 16, 1 1683; RELOC-PIC: .eabi_attribute 17, 2 1684; RELOC-OTHER: .eabi_attribute 17, 1 1685; RELOC-ROPI-NOT: .eabi_attribute 15, 1686; RELOC-ROPI: .eabi_attribute 16, 1 1687; RELOC-ROPI: .eabi_attribute 17, 1 1688; RELOC-RWPI: .eabi_attribute 15, 2 1689; RELOC-RWPI-NOT: .eabi_attribute 16, 1690; RELOC-RWPI: .eabi_attribute 17, 1 1691; RELOC-ROPI-RWPI: .eabi_attribute 15, 2 1692; RELOC-ROPI-RWPI: .eabi_attribute 16, 1 1693; RELOC-ROPI-RWPI: .eabi_attribute 17, 1 1694 1695; PCS-R9-USE: .eabi_attribute 14, 0 1696; PCS-R9-RESERVE: .eabi_attribute 14, 3 1697 1698; ARMv8R: .eabi_attribute 67, "2.09" @ Tag_conformance 1699; ARMv8R: .eabi_attribute 6, 15 @ Tag_CPU_arch 1700; ARMv8R: .eabi_attribute 7, 82 @ Tag_CPU_arch_profile 1701; ARMv8R: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use 1702; ARMv8R: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use 1703; ARMv8R-NOFPU-NOT: .fpu 1704; ARMv8R-NOFPU-NOT: .eabi_attribute 12 1705; ARMv8R-SP: .fpu fpv5-sp-d16 1706; ARMv8R-SP-NOT: .eabi_attribute 12 1707; ARMv8R-NEON: .fpu neon-fp-armv8 1708; ARMv8R-NEON: .eabi_attribute 12, 3 @ Tag_Advanced_SIMD_arch 1709; ARMv8R-NOFPU-NOT: .eabi_attribute 27 1710; ARMv8R-SP: .eabi_attribute 27, 1 @ Tag_ABI_HardFP_use 1711; ARMv8R-NEON-NOT: .eabi_attribute 27 1712; ARMv8R-NOFPU-NOT: .eabi_attribute 36 1713; ARMv8R-SP: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1714; ARMv8R-NEON: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1715; ARMv8R: .eabi_attribute 42, 1 @ Tag_MPextension_use 1716; ARMv8R: .eabi_attribute 68, 2 @ Tag_Virtualization_use 1717; ARMv8R: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format 1718; ARMv8R: .eabi_attribute 14, 0 @ Tag_ABI_PCS_R9_use 1719 1720; ARMv81M-MAIN: .eabi_attribute 6, 21 @ Tag_CPU_arch 1721; ARMv81M-MAIN-NOT: .eabi_attribute 48 1722; ARMv81M-MAIN-MVEINT: .eabi_attribute 6, 21 @ Tag_CPU_arch 1723; ARMv81M-MAIN-MVEINT: .eabi_attribute 48, 1 @ Tag_MVE_arch 1724; ARMv81M-MAIN-MVEFP: .eabi_attribute 6, 21 @ Tag_CPU_arch 1725; ARMv81M-MAIN-MVEFP: .eabi_attribute 48, 2 @ Tag_MVE_arch 1726 1727; CORTEX-M55: .cpu cortex-m55 1728; CORTEX-M55: .eabi_attribute 6, 21 1729; CORTEX-M55: .eabi_attribute 7, 77 1730; CORTEX-M55: .eabi_attribute 8, 0 1731; CORTEX-M55: .eabi_attribute 9, 3 1732; CORTEX-M55: .fpu fpv5-d16 1733; CORTEX-M55: .eabi_attribute 36, 1 1734; CORTEX-M55-NOT: .eabi_attribute 44 1735; CORTEX-M55: .eabi_attribute 46, 1 1736; CORTEX-M55: .eabi_attribute 34, 1 1737; CORTEX-M55: .eabi_attribute 17, 1 1738; CORTEX-M55-NOT: .eabi_attribute 19 1739; CORTEX-M55: .eabi_attribute 20, 1 1740; CORTEX-M55: .eabi_attribute 21, 1 1741; CORTEX-M55: .eabi_attribute 23, 3 1742; CORTEX-M55: .eabi_attribute 24, 1 1743; CORTEX-M55: .eabi_attribute 25, 1 1744; CORTEX-M55-NOT: .eabi_attribute 28 1745; CORTEX-M55: .eabi_attribute 38, 1 1746; CORTEX-M55: .eabi_attribute 14, 0 1747 1748define i32 @f(i64 %z) { 1749 ret i32 0 1750} 1751