1; REQUIRES: asserts 2; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-a57 -misched-postra -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s 3 4; CHECK-LABEL: subv_i32:%bb.0 5; CHECK: SU(8): {{.*}} VSUBv4i32 6; CHECK-NEXT: # preds left 7; CHECK-NEXT: # succs left 8; CHECK-NEXT: # rdefs left 9; CHECK-NEXT: Latency : 3 10 11define <4 x i32> @subv_i32(<4 x i32>, <4 x i32>) { 12 %3 = sub <4 x i32> %1, %0 13 ret <4 x i32> %3 14} 15 16; CHECK-LABEL: subv_f32:%bb.0 17; CHECK: SU(8): {{.*}} VSUBfq 18; CHECK-NEXT: # preds left 19; CHECK-NEXT: # succs left 20; CHECK-NEXT: # rdefs left 21; CHECK-NEXT: Latency : 5 22 23define <4 x float> @subv_f32(<4 x float>, <4 x float>) { 24 %3 = fsub <4 x float> %0, %1 25 ret <4 x float> %3 26} 27