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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -run-pass=arm-pseudo -verify-machineinstrs %s -o - | FileCheck %s
3--- |
4  target triple = "armv7---gnueabi"
5
6  define i32 @test1(i32 %x) {
7  entry:
8    unreachable
9  }
10  define i32 @test2(i32 %x) {
11  entry:
12    unreachable
13  }
14  define i32 @test3(i32 %x) {
15  entry:
16    unreachable
17  }
18...
19---
20name:            test1
21alignment:       4
22tracksRegLiveness: true
23liveins:
24  - { reg: '$r0', virtual-reg: '' }
25body:             |
26  bb.0.entry:
27    liveins: $r0
28
29    ; CHECK-LABEL: name: test1
30    ; CHECK: liveins: $r0
31    ; CHECK: $r1 = MOVi 2, 14 /* CC::al */, $noreg, $noreg
32    ; CHECK: CMPri killed $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
33    ; CHECK: $r1 = MOVi16 500, 0 /* CC::eq */, killed $cpsr, implicit killed $r1
34    ; CHECK: $r0 = MOVr killed $r1, 14 /* CC::al */, $noreg, $noreg
35    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
36    $r1 = MOVi 2, 14, $noreg, $noreg
37    CMPri killed $r0, 0, 14, $noreg, implicit-def $cpsr
38    $r1 = MOVCCi16 killed $r1, 500, 0, killed $cpsr
39    $r0 = MOVr killed $r1, 14, $noreg, $noreg
40    BX_RET 14, $noreg, implicit $r0
41
42...
43---
44name:            test2
45alignment:       4
46tracksRegLiveness: true
47liveins:
48  - { reg: '$r0', virtual-reg: '' }
49body:             |
50  bb.0.entry:
51    liveins: $r0
52
53    ; CHECK-LABEL: name: test2
54    ; CHECK: liveins: $r0
55    ; CHECK: $r1 = MOVi 2, 14 /* CC::al */, $noreg, $noreg
56    ; CHECK: CMPri killed $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
57    ; CHECK: $r1 = MOVi16 2068, 0 /* CC::eq */, $cpsr, implicit killed $r1
58    ; CHECK: $r1 = MOVTi16 $r1, 7637, 0 /* CC::eq */, $cpsr
59    ; CHECK: $r0 = MOVr killed $r1, 14 /* CC::al */, $noreg, $noreg
60    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
61    $r1 = MOVi 2, 14, $noreg, $noreg
62    CMPri killed $r0, 0, 14, $noreg, implicit-def $cpsr
63    $r1 = MOVCCi32imm killed $r1, 500500500, 0, killed $cpsr
64    $r0 = MOVr killed $r1, 14, $noreg, $noreg
65    BX_RET 14, $noreg, implicit $r0
66
67...
68---
69name:            test3
70alignment:       4
71tracksRegLiveness: true
72liveins:
73  - { reg: '$r0', virtual-reg: '' }
74  - { reg: '$r1', virtual-reg: '' }
75body:             |
76  bb.0.entry:
77    liveins: $r0, $r1
78
79    ; CHECK-LABEL: name: test3
80    ; CHECK: liveins: $r0, $r1
81    ; CHECK: CMPri $r1, 500, 14 /* CC::al */, $noreg, implicit-def $cpsr
82    ; CHECK: $r0 = MOVr killed $r1, 12 /* CC::gt */, killed $cpsr, $noreg, implicit killed $r0
83    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
84    CMPri $r1, 500, 14, $noreg, implicit-def $cpsr
85    $r0 = MOVCCr killed $r0, killed $r1, 12, killed $cpsr
86    BX_RET 14, $noreg, implicit $r0
87
88...
89