1; Disable shrink-wrapping on the first test otherwise we wouldn't 2; exercise the path for PR18136. 3; RUN: llc -mtriple=thumbv7-apple-none-macho < %s -enable-shrink-wrap=false -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK 4; RUN: llc -mtriple=thumbv6m-apple-none-macho -frame-pointer=all < %s -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK-T1 5; RUN: llc -mtriple=thumbv6m-apple-none-macho < %s -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK-T1-NOFP 6; RUN: llc -mtriple=thumbv7-apple-darwin-ios -frame-pointer=all < %s -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK-IOS 7; RUN: llc -mtriple=thumbv7--linux-gnueabi -frame-pointer=all < %s -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK-LINUX 8 9declare void @bar(i8*) 10 11%bigVec = type [2 x double] 12 13@var = global %bigVec zeroinitializer 14 15define void @check_simple() minsize { 16; CHECK-FNSTART-LABEL: check_simple: 17; CHECK: push {r3, r4, r5, r6, r7, lr} 18; CHECK-NOT: sub sp, sp, 19; ... 20; CHECK-NOT: add sp, sp, 21; CHECK: pop {r0, r1, r2, r3, r7, pc} 22 23; CHECK-T1: push {r3, r4, r5, r6, r7, lr} 24; CHECK-T1: add r7, sp, #16 25; CHECK-T1-NOT: sub sp, sp, 26; ... 27; CHECK-T1-NOT: add sp, sp, 28; CHECK-T1: pop {r0, r1, r2, r3, r7, pc} 29 30 ; iOS always has a frame pointer and messing with the push affects 31 ; how it's set in the prologue. Make sure we get that right. 32; CHECK-IOS: push {r3, r4, r5, r6, r7, lr} 33; CHECK-IOS-NOT: sub sp, 34; CHECK-IOS: add r7, sp, #16 35; CHECK-IOS-NOT: sub sp, 36; ... 37; CHECK-IOS-NOT: add sp, 38; CHECK-IOS: pop {r0, r1, r2, r3, r7, pc} 39 40 %var = alloca i8, i32 16 41 call void @bar(i8* %var) 42 ret void 43} 44 45define i32 @check_simple_ret() minsize { 46; CHECK-FNSTART-LABEL: check_simple_ret: 47; CHECK: push {r5, r6, r7, lr} 48; CHECK-NOT: sub sp, 49; ... 50; CHECK-NOT: add sp, 51; CHECK: pop {r2, r3, r7, pc} 52 53 %var = alloca i8, i32 8 54 call void @bar(i8* %var) 55 ret i32 0 56} 57 58define void @check_simple_too_big() minsize { 59; CHECK-FNSTART-LABEL: check_simple_too_big: 60; CHECK: push {r7, lr} 61; CHECK: sub sp, 62; ... 63; CHECK: add sp, 64; CHECK: pop {r7, pc} 65 %var = alloca i8, i32 64 66 call void @bar(i8* %var) 67 ret void 68} 69 70define void @check_vfp_fold() minsize { 71; CHECK-FNSTART-LABEL: check_vfp_fold: 72; CHECK: push {r[[GLOBREG:[0-9]+]], lr} 73; CHECK: vpush {d6, d7, d8, d9} 74; CHECK-NOT: sub sp, 75; ... 76; CHECK-NOT: add sp, 77; CHECK: vpop {d6, d7, d8, d9} 78; CHECK: pop {r[[GLOBREG]], pc} 79 80 ; iOS uses aligned NEON stores here, which is convenient since we 81 ; want to make sure that works too. 82; CHECK-IOS: push {r4, r7, lr} 83; CHECK-IOS: sub.w r4, sp, #16 84; CHECK-IOS: bfc r4, #0, #4 85; CHECK-IOS: mov sp, r4 86; CHECK-IOS: vst1.64 {d8, d9}, [r4:128] 87; CHECK-IOS: sub sp, #16 88; ... 89; CHECK-IOS: add r4, sp, #16 90; CHECK-IOS: vld1.64 {d8, d9}, [r4:128] 91; CHECK-IOS: mov sp, r4 92; CHECK-IOS: pop {r4, r7, pc} 93 94 %var = alloca i8, i32 16 95 96 call void asm "", "r,~{d8},~{d9}"(i8* %var) 97 call void @bar(i8* %var) 98 99 ret void 100} 101 102; This function should use just enough space that the "add sp, sp, ..." could be 103; folded in except that doing so would clobber the value being returned. 104define i64 @check_no_return_clobber() minsize { 105; CHECK-FNSTART-LABEL: check_no_return_clobber: 106; CHECK: push {r1, r2, r3, r4, r5, r6, r7, lr} 107; CHECK-NOT: sub sp, 108; ... 109; CHECK: add sp, #24 110; CHECK: pop {r7, pc} 111 112 %var = alloca i8, i32 20 113 call void @bar(i8* %var) 114 ret i64 0 115} 116 117define arm_aapcs_vfpcc double @check_vfp_no_return_clobber() minsize { 118; CHECK-FNSTART-LABEL: check_vfp_no_return_clobber: 119; CHECK: push {r[[GLOBREG:[0-9]+]], lr} 120; CHECK: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8, d9} 121; CHECK-NOT: sub sp, 122; ... 123; CHECK: add sp, #64 124; CHECK: vpop {d8, d9} 125; CHECK: pop {r[[GLOBREG]], pc} 126 127 %var = alloca i8, i32 64 128 129 %tmp = load %bigVec, %bigVec* @var 130 call void @bar(i8* %var) 131 store %bigVec %tmp, %bigVec* @var 132 133 ret double 1.0 134} 135 136@dbl = global double 0.0 137 138; PR18136: there was a bug determining where the first eligible pop in a 139; basic-block was when the entire block was epilogue code. 140define void @test_fold_point(i1 %tst) minsize { 141; CHECK-FNSTART-LABEL: test_fold_point: 142 143 ; Important to check for beginning of basic block, because if it gets 144 ; if-converted the test is probably no longer checking what it should. 145; CHECK: %end 146; CHECK-NEXT: vpop {d7, d8} 147; CHECK-NEXT: pop {r4, pc} 148 149 ; With a guaranteed frame-pointer, we want to make sure that its offset in the 150 ; push block is correct, even if a few registers have been tacked onto a later 151 ; vpush (PR18160). 152; CHECK-IOS: push {r4, r7, lr} 153; CHECK-IOS-NEXT: add r7, sp, #4 154; CHECK-IOS-NEXT: vpush {d7, d8} 155 156 ; We want some memory so there's a stack adjustment to fold... 157 %var = alloca i8, i32 8 158 159 ; We want a long-lived floating register so that a callee-saved dN is used and 160 ; there's both a vpop and a pop. 161 %live_val = load double, double* @dbl 162 br i1 %tst, label %true, label %end 163true: 164 call void @bar(i8* %var) 165 store double %live_val, double* @dbl 166 br label %end 167end: 168 ; We want the epilogue to be the only thing in a basic block so that we hit 169 ; the correct edge-case (first inst in block is correct one to adjust). 170 ret void 171} 172 173define void @test_varsize(...) minsize { 174; CHECK-FNSTART-LABEL: test_varsize: 175; CHECK-T1: sub sp, #16 176; CHECK-T1: push {r5, r6, r7, lr} 177; ... 178; CHECK-T1: pop {r2, r3, r7} 179; CHECK-T1: pop {[[POP_REG:r[0-3]]]} 180; CHECK-T1: add sp, #16 181; CHECK-T1: bx [[POP_REG]] 182 183; CHECK: sub sp, #16 184; CHECK: push {r5, r6, r7, lr} 185; ... 186; CHECK: pop.w {r2, r3, r7, lr} 187; CHECK: add sp, #16 188; CHECK: bx lr 189 190 %var = alloca i8, i32 8 191 call void @llvm.va_start(i8* %var) 192 call void @bar(i8* %var) 193 ret void 194} 195 196%"MyClass" = type { i8*, i32, i32, float, float, float, [2 x i8], i32, i32* } 197 198declare float @foo() 199 200declare void @bar3() 201 202declare %"MyClass"* @bar2(%"MyClass"* returned, i16*, i32, float, float, i32, i32, i1 zeroext, i1 zeroext, i32) 203 204define fastcc float @check_vfp_no_return_clobber2(i16* %r, i16* %chars, i32 %length, i1 zeroext %flag) minsize { 205entry: 206; CHECK-FNSTART-LABEL: check_vfp_no_return_clobber2 207; CHECK-LINUX: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8} 208; CHECK-NOT: sub sp, 209; ... 210; CHECK-LINUX: add sp 211; CHECK-LINUX: vpop {d8} 212 %run = alloca %"MyClass", align 4 213 %call = call %"MyClass"* @bar2(%"MyClass"* %run, i16* %chars, i32 %length, float 0.000000e+00, float 0.000000e+00, i32 1, i32 1, i1 zeroext false, i1 zeroext true, i32 3) 214 %call1 = call float @foo() 215 %cmp = icmp eq %"MyClass"* %run, null 216 br i1 %cmp, label %exit, label %if.then 217 218if.then: ; preds = %entry 219 call void @bar3() 220 br label %exit 221 222exit: ; preds = %if.then, %entry 223 ret float %call1 224} 225 226declare void @use_arr(i32*) 227define void @test_fold_reuse() minsize { 228; CHECK-FNSTART-LABEL: test_fold_reuse: 229; CHECK: push.w {r4, r7, r8, lr} 230; CHECK: sub sp, #24 231; [...] 232; CHECK: add sp, #24 233; CHECK: pop.w {r4, r7, r8, pc} 234 %arr = alloca i8, i32 24 235 call void asm sideeffect "", "~{r8},~{r4}"() 236 call void @bar(i8* %arr) 237 ret void 238} 239 240; It doesn't matter what registers this pushes and pops; just make sure 241; it doesn't try to push/pop an illegal register on Thumb1. 242define void @test_long_fn() minsize nounwind optsize { 243; CHECK-FNSTART-LABEL: test_long_fn: 244; CHECK-T1-NOFP: push {r7, lr} 245; CHECK-T1-NOFP: pop {r3, pc} 246entry: 247 %z = alloca i32, align 4 248 call void asm sideeffect ".space 3000", "r"(i32* nonnull %z) 249 ret void 250} 251 252declare void @llvm.va_start(i8*) nounwind 253