1# RUN: llc -mtriple=arm-none-eabi -run-pass=arm-cp-islands %s -o - | FileCheck %s 2# 3# This checks alignment of a block when a CPE is placed before/after a 4# block (as e.g. opposed to splitting up a block), and also make sure 5# we don't decrease alignment. 6# 7--- | 8 ; ModuleID = '<stdin>' 9 source_filename = "<stdin>" 10 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 11 target triple = "arm-arm--eabi" 12 13 declare i32 @llvm.arm.space(i32, i32) #0 14 15 define dso_local i32 @CP() #1 { 16 entry: 17 %res = alloca half, align 2 18 store half 0xH706B, half* %res, align 2 19 %0 = load half, half* %res, align 2 20 %tobool = fcmp une half %0, 0xH0000 21 br i1 %tobool, label %LA, label %END 22 23 LA: ; preds = %entry 24 %1 = call i32 @llvm.arm.space(i32 1000, i32 undef) 25 br label %END 26 27 END: ; preds = %LA, %entry 28 %2 = call i32 @llvm.arm.space(i32 100, i32 undef) 29 ret i32 42 30 } 31 32 ; Function Attrs: nounwind 33 declare void @llvm.stackprotector(i8*, i8**) #2 34 35 attributes #0 = { nounwind "target-features"="+v8.2a,+fullfp16" } 36 attributes #1 = { "target-features"="+v8.2a,+fullfp16" } 37 attributes #2 = { nounwind } 38 39... 40--- 41name: CP 42alignment: 4 43exposesReturnsTwice: false 44legalized: false 45regBankSelected: false 46selected: false 47tracksRegLiveness: true 48registers: 49liveins: 50frameInfo: 51 isFrameAddressTaken: false 52 isReturnAddressTaken: false 53 hasStackMap: false 54 hasPatchPoint: false 55 stackSize: 4 56 offsetAdjustment: 0 57 maxAlignment: 2 58 adjustsStack: false 59 hasCalls: false 60 stackProtector: '' 61 maxCallFrameSize: 0 62 hasOpaqueSPAdjustment: false 63 hasVAStart: false 64 hasMustTailInVarArgFunc: false 65 savePoint: '' 66 restorePoint: '' 67fixedStack: 68stack: 69 - { id: 0, name: res, type: default, offset: -2, size: 2, alignment: 2, 70 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 71 local-offset: -2, debug-info-variable: '', debug-info-expression: '', 72 debug-info-location: '' } 73constants: 74 - id: 0 75 value: half 0xH706B 76 alignment: 2 77 isTargetSpecific: false 78 79 80#CHECK: bb.{{.*}} (align 2): 81#CHECK: successors: 82#CHECK: CONSTPOOL_ENTRY 1, %const{{.*}}, 2 83# 84# We don't want to decrease alignment if the block already has been 85# aligned; this can e.g. be an existing CPE that has been carefully 86# aligned. Here BB.1.LA has already an 8-byte alignment, and we are 87# checking we don't set it to 4: 88# 89#CHECK: bb.{{.*}}.LA (align 8): 90 91body: | 92 bb.0.entry: 93 successors: %bb.1(0x50000000), %bb.2(0x30000000) 94 95 $sp = frame-setup SUBri $sp, 4, 14, $noreg, $noreg 96 frame-setup CFI_INSTRUCTION def_cfa_offset 4 97 renamable $s0 = VLDRH %const.0, 0, 14, $noreg :: (load 2 from constant-pool) 98 VCMPZH renamable $s0, 14, $noreg, implicit-def $fpscr_nzcv 99 VSTRH killed renamable $s0, $sp, 1, 14, $noreg :: (store 2 into %ir.res) 100 FMSTAT 14, $noreg, implicit-def $cpsr, implicit killed $fpscr_nzcv 101 Bcc %bb.2, 0, killed $cpsr 102 103 bb.1.LA (align 8): 104 successors: %bb.2(0x80000000) 105 106 dead renamable $r0 = SPACE 1000, undef renamable $r0 107 108 bb.2.END: 109 dead renamable $r0 = SPACE 100, undef renamable $r0 110 $r0 = MOVi 42, 14, $noreg, $noreg 111 $sp = ADDri $sp, 4, 14, $noreg, $noreg 112 BX_RET 14, $noreg, implicit killed $r0 113 114... 115