1; RUN: llc -asm-verbose=false < %s | FileCheck %s 2 3target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 4target triple = "armv8.2a-arm-unknown-eabihf" 5 6define dso_local void @vec8(half* nocapture readonly %V, i32 %N) local_unnamed_addr #0 { 7; CHECK: .LBB0_1: 8; CHECK-NEXT: vld1.16 {d16, d17}, [r0]! 9; CHECK-NEXT: subs r1, r1, #8 10; CHECK-NEXT: bne .LBB0_1 11entry: 12 br label %vector.body 13 14vector.body: 15 %index = phi i32 [ 0, %entry ], [ %index.next, %vector.body ] 16 %0 = getelementptr inbounds half, half* %V, i32 %index 17 %1 = bitcast half* %0 to <8 x half>* 18 %wide.load = load volatile <8 x half>, <8 x half>* %1, align 2 19 %index.next = add i32 %index, 8 20 %cmp = icmp eq i32 %index.next, %N 21 br i1 %cmp, label %byeblock, label %vector.body 22 23byeblock: 24 ret void 25} 26 27define dso_local void @vec4(half* nocapture readonly %V, i32 %N) local_unnamed_addr #0 { 28; CHECK: .LBB1_1: 29; CHECK-NEXT: vld1.16 {d16}, [r0]! 30; CHECK-NEXT: subs r1, r1, #4 31; CHECK-NEXT: bne .LBB1_1 32entry: 33 br label %vector.body 34 35vector.body: 36 %index = phi i32 [ 0, %entry ], [ %index.next, %vector.body ] 37 %0 = getelementptr inbounds half, half* %V, i32 %index 38 %1 = bitcast half* %0 to <4 x half>* 39 %wide.load = load volatile <4 x half>, <4 x half>* %1, align 2 40 %index.next = add i32 %index, 4 41 %cmp = icmp eq i32 %index.next, %N 42 br i1 %cmp, label %byeblock, label %vector.body 43 44byeblock: 45 ret void 46} 47 48attributes #0 = { norecurse nounwind readonly "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "target-cpu"="generic" "target-features"="+armv8.2-a,+fullfp16,+strict-align,-thumb-mode" "unsafe-fp-math"="true" "use-soft-float"="false" } 49