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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
3; Check if the f32 load / store pair are optimized to i32 load / store.
4; rdar://8944252
5
6define void @t(i32 %width, float* nocapture %src, float* nocapture %dst, i32 %index) nounwind {
7; CHECK-LABEL: t:
8; CHECK:       @ %bb.0: @ %entry
9; CHECK-NEXT:    cmp r0, #0
10; CHECK-NEXT:    bxeq lr
11; CHECK-NEXT:  LBB0_1: @ %bb
12; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
13; CHECK-NEXT:    ldr r9, [r1], r3
14; CHECK-NEXT:    subs r0, r0, #1
15; CHECK-NEXT:    str r9, [r2], #4
16; CHECK-NEXT:    bne LBB0_1
17; CHECK-NEXT:  @ %bb.2: @ %return
18; CHECK-NEXT:    bx lr
19entry:
20  %src6 = bitcast float* %src to i8*
21  %0 = icmp eq i32 %width, 0
22  br i1 %0, label %return, label %bb
23
24bb:
25  %j.05 = phi i32 [ %2, %bb ], [ 0, %entry ]
26  %tmp = mul i32 %j.05, %index
27  %uglygep = getelementptr i8, i8* %src6, i32 %tmp
28  %src_addr.04 = bitcast i8* %uglygep to float*
29  %dst_addr.03 = getelementptr float, float* %dst, i32 %j.05
30  %1 = load float, float* %src_addr.04, align 4
31  store float %1, float* %dst_addr.03, align 4
32  %2 = add i32 %j.05, 1
33  %exitcond = icmp eq i32 %2, %width
34  br i1 %exitcond, label %return, label %bb
35
36return:
37  ret void
38}
39
40@a1 = local_unnamed_addr global float 0.000000e+00, align 4
41@a2 = local_unnamed_addr global float 0.000000e+00, align 4
42@a3 = local_unnamed_addr global float 0.000000e+00, align 4
43@a4 = local_unnamed_addr global float 0.000000e+00, align 4
44@a5 = local_unnamed_addr global float 0.000000e+00, align 4
45@a6 = local_unnamed_addr global float 0.000000e+00, align 4
46@a7 = local_unnamed_addr global float 0.000000e+00, align 4
47@a8 = local_unnamed_addr global float 0.000000e+00, align 4
48
49
50declare void @_Z3fooddddddddddddddd(float, float, float, float, float, float, float, float)
51
52; Because this test function is trying to pass float argument by stack,
53; it can be optimized to i32 load / store
54define signext i32 @test() {
55%1 = load float, float* @a1, align 4
56%2 = load float, float* @a2, align 4
57%3 = load float, float* @a3, align 4
58%4 = load float, float* @a4, align 4
59%5 = load float, float* @a5, align 4
60%6 = load float, float* @a6, align 4
61%7 = load float, float* @a7, align 4
62%8 = load float, float* @a8, align 4
63tail call void @_Z3fooddddddddddddddd(float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8)
64ret i32 0
65}
66
67; CHECK-LABEL: _test:
68; CHECK: ldr r3, [pc, r3]
69; CHECK: ldr r2, [pc, r2]
70; CHECK: ldr r1, [pc, r1]
71; CHECK: ldr r0, [pc, r0]
72; CHECK: ldr r9, [pc, r9]
73; CHECK: ldr r12, [pc, r12]
74; CHECK: ldr lr, [pc, lr]
75; CHECK: stm sp, {r9, r12, lr}
76; CHECK: ldr r4, [pc, r4]
77; CHECK: str r4, [sp, #12]
78; CHECK: bl __Z3fooddddddddddddddd
79