1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=arm-- -run-pass=machine-outliner -verify-machineinstrs \ 3# RUN: %s -o - | FileCheck %s 4 5--- | 6 define void @outline_cpsr_r12_ok() #0 { ret void } 7 define void @dont_outline_cpsr_r12_1() #0 { ret void } 8 define void @dont_outline_cpsr_r12_2() #0 { ret void } 9 declare void @z(i32, i32, i32, i32) 10 11 attributes #0 = { minsize optsize } 12... 13--- 14 15name: outline_cpsr_r12_ok 16tracksRegLiveness: true 17body: | 18 ; CHECK-LABEL: name: outline_cpsr_r12_ok 19 ; CHECK: bb.0: 20 ; CHECK: BL @OUTLINED_FUNCTION_0 21 ; CHECK: $r3 = MOVr $r12, 14 /* CC::al */, $noreg, $noreg 22 ; CHECK: bb.1: 23 ; CHECK: BL @OUTLINED_FUNCTION_0 24 ; CHECK: $r4 = MOVr $r12, 14 /* CC::al */, $noreg, $noreg 25 bb.0: 26 $r12 = MOVi 1, 14, $noreg, $noreg 27 CMPri $r12, 42, 14, $noreg, implicit-def $cpsr 28 $r0 = MOVi 1, 14, $noreg, $noreg 29 $r1 = MOVi 1, 14, $noreg, $noreg 30 $r2 = MOVi 1, 14, $noreg, $noreg 31 $r3 = MOVi 1, 14, $noreg, $noreg 32 BL @z 33 $r3 = MOVr $r12, 14, $noreg, $noreg 34 bb.1: 35 $r12 = MOVi 1, 14, $noreg, $noreg 36 CMPri $r12, 42, 14, $noreg, implicit-def $cpsr 37 $r0 = MOVi 1, 14, $noreg, $noreg 38 $r1 = MOVi 1, 14, $noreg, $noreg 39 $r2 = MOVi 1, 14, $noreg, $noreg 40 $r3 = MOVi 1, 14, $noreg, $noreg 41 BL @z 42 $r4 = MOVr $r12, 14, $noreg, $noreg 43 bb.2: 44 BX_RET 14, $noreg 45... 46--- 47 48name: dont_outline_cpsr_r12_1 49tracksRegLiveness: true 50body: | 51 ; CHECK-LABEL: name: dont_outline_cpsr_r12_1 52 ; CHECK: bb.0: 53 ; CHECK: BL @OUTLINED_FUNCTION_1 54 ; CHECK: bb.1: 55 ; CHECK: BL @OUTLINED_FUNCTION_1 56 ; CHECK-LABEL: bb.2: 57 ; CHECK-NOT: BL @OUTLINED_FUNCTION_1 58 bb.0: 59 $r0 = MOVi 2, 14, $noreg, $noreg 60 $r1 = MOVi 2, 14, $noreg, $noreg 61 $r2 = MOVi 2, 14, $noreg, $noreg 62 $r3 = MOVi 2, 14, $noreg, $noreg 63 BL @z 64 bb.1: 65 $r0 = MOVi 2, 14, $noreg, $noreg 66 $r1 = MOVi 2, 14, $noreg, $noreg 67 $r2 = MOVi 2, 14, $noreg, $noreg 68 $r3 = MOVi 2, 14, $noreg, $noreg 69 BL @z 70 bb.2: 71 $r12 = MOVi 1, 14, $noreg, $noreg 72 CMPri $r12, 42, 14, $noreg, implicit-def $cpsr 73 $r0 = MOVi 2, 14, $noreg, $noreg 74 $r1 = MOVi 2, 14, $noreg, $noreg 75 $r2 = MOVi 2, 14, $noreg, $noreg 76 $r3 = MOVi 2, 14, $noreg, $noreg 77 BL @z 78 bb.3: 79 liveins: $cpsr, $r12 80 BX_RET 14, $noreg 81... 82--- 83 84name: dont_outline_cpsr_r12_2 85tracksRegLiveness: true 86body: | 87 ; CHECK-LABEL: name: dont_outline_cpsr_r12_2 88 ; CHECK-NOT: BL @OUTLINED_FUNCTION 89 bb.0: 90 liveins: $r12 91 CMPri $r12, 42, 14, $noreg, implicit-def $cpsr 92 $r0 = MOVi 3, 14, $noreg, $noreg 93 $r1 = MOVi 3, 14, $noreg, $noreg 94 $r2 = MOVi 3, 14, $noreg, $noreg 95 $r3 = MOVi 3, 14, $noreg, $noreg 96 BL @z 97 bb.1: 98 liveins: $r12 99 CMPri $r12, 42, 14, $noreg, implicit-def $cpsr 100 $r0 = MOVi 3, 14, $noreg, $noreg 101 $r1 = MOVi 3, 14, $noreg, $noreg 102 $r2 = MOVi 3, 14, $noreg, $noreg 103 $r3 = MOVi 3, 14, $noreg, $noreg 104 BL @z 105 bb.2: 106 liveins: $r12 107 CMPri $r12, 42, 14, $noreg, implicit-def $cpsr 108 $r0 = MOVi 3, 14, $noreg, $noreg 109 $r1 = MOVi 3, 14, $noreg, $noreg 110 $r2 = MOVi 3, 14, $noreg, $noreg 111 $r3 = MOVi 3, 14, $noreg, $noreg 112 BL @z 113 bb.3: 114 BX_RET 14, $noreg 115