1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefixes=ANY,SOFTFLOAT 3; RUN: llc < %s -mtriple=thumbv8-linux-gnueabihf -mattr=neon | FileCheck %s --check-prefixes=ANY,HARDFLOAT 4 5declare float @llvm.pow.f32(float, float) 6declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>) 7 8declare double @llvm.pow.f64(double, double) 9declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>) 10 11define float @pow_f32_one_fourth_fmf(float %x) nounwind { 12; ANY-LABEL: pow_f32_one_fourth_fmf: 13; SOFTFLOAT: bl powf 14; HARDFLOAT: vsqrt.f32 15; HARDFLOAT: vsqrt.f32 16 %r = call nsz ninf afn float @llvm.pow.f32(float %x, float 2.5e-01) 17 ret float %r 18} 19 20define double @pow_f64_one_fourth_fmf(double %x) nounwind { 21; ANY-LABEL: pow_f64_one_fourth_fmf: 22; SOFTFLOAT: bl pow 23; HARDFLOAT: vsqrt.f64 24; HARDFLOAT: vsqrt.f64 25 %r = call nsz ninf afn double @llvm.pow.f64(double %x, double 2.5e-01) 26 ret double %r 27} 28 29define float @pow_f32_one_third_fmf(float %x) nounwind { 30; ANY-LABEL: pow_f32_one_third_fmf: 31; SOFTFLOAT: bl cbrtf 32; HARDFLOAT: b cbrtf 33 %r = call fast float @llvm.pow.f32(float %x, float 0x3FD5555560000000) 34 ret float %r 35} 36 37define double @pow_f64_one_third_fmf(double %x) nounwind { 38; ANY-LABEL: pow_f64_one_third_fmf: 39; SOFTFLOAT: bl cbrt 40; HARDFLOAT: b cbrt 41 %r = call fast double @llvm.pow.f64(double %x, double 0x3FD5555555555555) 42 ret double %r 43} 44 45define <4 x float> @pow_v4f32_one_fourth_fmf(<4 x float> %x) nounwind { 46; ANY-LABEL: pow_v4f32_one_fourth_fmf: 47; SOFTFLOAT: bl powf 48; SOFTFLOAT: bl powf 49; SOFTFLOAT: bl powf 50; SOFTFLOAT: bl powf 51; HARDFLOAT: vsqrt.f32 52; HARDFLOAT: vsqrt.f32 53; HARDFLOAT: vsqrt.f32 54; HARDFLOAT: vsqrt.f32 55; HARDFLOAT: vsqrt.f32 56; HARDFLOAT: vsqrt.f32 57; HARDFLOAT: vsqrt.f32 58; HARDFLOAT: vsqrt.f32 59 %r = call fast <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> <float 2.5e-1, float 2.5e-1, float 2.5e-01, float 2.5e-01>) 60 ret <4 x float> %r 61} 62 63define <2 x double> @pow_v2f64_one_fourth_fmf(<2 x double> %x) nounwind { 64; ANY-LABEL: pow_v2f64_one_fourth_fmf: 65; SOFTFLOAT: bl pow 66; SOFTFLOAT: bl pow 67; HARDFLOAT: vsqrt.f64 68; HARDFLOAT: vsqrt.f64 69; HARDFLOAT: vsqrt.f64 70; HARDFLOAT: vsqrt.f64 71 %r = call fast <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 2.5e-1, double 2.5e-1>) 72 ret <2 x double> %r 73} 74 75define float @pow_f32_one_fourth_not_enough_fmf(float %x) nounwind { 76; ANY-LABEL: pow_f32_one_fourth_not_enough_fmf: 77; SOFTFLOAT: bl powf 78; HARDFLOAT: b powf 79 %r = call afn ninf float @llvm.pow.f32(float %x, float 2.5e-01) 80 ret float %r 81} 82 83define double @pow_f64_one_fourth_not_enough_fmf(double %x) nounwind { 84; ANY-LABEL: pow_f64_one_fourth_not_enough_fmf: 85; SOFTFLOAT: bl pow 86; HARDFLOAT: b pow 87 %r = call nsz ninf double @llvm.pow.f64(double %x, double 2.5e-01) 88 ret double %r 89} 90 91define <4 x float> @pow_v4f32_one_fourth_not_enough_fmf(<4 x float> %x) nounwind { 92; ANY-LABEL: pow_v4f32_one_fourth_not_enough_fmf: 93; ANY: bl powf 94; ANY: bl powf 95; ANY: bl powf 96; ANY: bl powf 97 %r = call afn nsz <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> <float 2.5e-1, float 2.5e-1, float 2.5e-01, float 2.5e-01>) 98 ret <4 x float> %r 99} 100 101define <2 x double> @pow_v2f64_one_fourth_not_enough_fmf(<2 x double> %x) nounwind { 102; ANY-LABEL: pow_v2f64_one_fourth_not_enough_fmf: 103; ANY: bl pow 104; ANY: bl pow 105 %r = call nsz nnan reassoc <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> <double 2.5e-1, double 2.5e-1>) 106 ret <2 x double> %r 107} 108 109