1; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 2; RUN: llc < %s -mtriple=armv7m-eabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 3; RUN: llc < %s -mtriple=armv8m-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 4; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC 5 6; Check we use AA during codegen, so can interleave these loads/stores. 7 8; CHECK-LABEL: test 9; GENERIC: ldr 10; GENERIC: ldr 11; GENERIC: str 12; GENERIC: str 13; USEAA: ldr 14; USEAA: ldr 15; USEAA: str 16; USEAA: str 17 18define void @test(i32* nocapture %a, i32* noalias nocapture %b) { 19entry: 20 %0 = load i32, i32* %a, align 4 21 %add = add nsw i32 %0, 10 22 store i32 %add, i32* %a, align 4 23 %1 = load i32, i32* %b, align 4 24 %add2 = add nsw i32 %1, 20 25 store i32 %add2, i32* %b, align 4 26 ret void 27} 28 29