1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=arm-none-eabi -mattr=-neon | FileCheck %s --check-prefix=CHECK 3 4declare half @llvm.vector.reduce.fmin.v4f16(<4 x half>) 5declare float @llvm.vector.reduce.fmin.v4f32(<4 x float>) 6declare double @llvm.vector.reduce.fmin.v2f64(<2 x double>) 7declare fp128 @llvm.vector.reduce.fmin.v2f128(<2 x fp128>) 8 9define half @test_v4f16(<4 x half> %a) nounwind { 10; CHECK-LABEL: test_v4f16: 11; CHECK: @ %bb.0: 12; CHECK-NEXT: .save {r4, r5, r6, r7, r8, lr} 13; CHECK-NEXT: push {r4, r5, r6, r7, r8, lr} 14; CHECK-NEXT: mov r4, #255 15; CHECK-NEXT: mov r7, r0 16; CHECK-NEXT: orr r4, r4, #65280 17; CHECK-NEXT: mov r5, r2 18; CHECK-NEXT: and r0, r3, r4 19; CHECK-NEXT: mov r6, r1 20; CHECK-NEXT: bl __aeabi_h2f 21; CHECK-NEXT: mov r8, r0 22; CHECK-NEXT: and r0, r5, r4 23; CHECK-NEXT: bl __aeabi_h2f 24; CHECK-NEXT: mov r5, r0 25; CHECK-NEXT: and r0, r7, r4 26; CHECK-NEXT: bl __aeabi_h2f 27; CHECK-NEXT: mov r7, r0 28; CHECK-NEXT: and r0, r6, r4 29; CHECK-NEXT: bl __aeabi_h2f 30; CHECK-NEXT: mov r1, r0 31; CHECK-NEXT: mov r0, r7 32; CHECK-NEXT: bl fminf 33; CHECK-NEXT: mov r1, r5 34; CHECK-NEXT: bl fminf 35; CHECK-NEXT: mov r1, r8 36; CHECK-NEXT: bl fminf 37; CHECK-NEXT: bl __aeabi_f2h 38; CHECK-NEXT: pop {r4, r5, r6, r7, r8, lr} 39; CHECK-NEXT: mov pc, lr 40 %b = call fast half @llvm.vector.reduce.fmin.v4f16(<4 x half> %a) 41 ret half %b 42} 43 44define float @test_v4f32(<4 x float> %a) nounwind { 45; CHECK-LABEL: test_v4f32: 46; CHECK: @ %bb.0: 47; CHECK-NEXT: .save {r4, r5, r11, lr} 48; CHECK-NEXT: push {r4, r5, r11, lr} 49; CHECK-NEXT: mov r4, r3 50; CHECK-NEXT: mov r5, r2 51; CHECK-NEXT: bl fminf 52; CHECK-NEXT: mov r1, r5 53; CHECK-NEXT: bl fminf 54; CHECK-NEXT: mov r1, r4 55; CHECK-NEXT: bl fminf 56; CHECK-NEXT: pop {r4, r5, r11, lr} 57; CHECK-NEXT: mov pc, lr 58 %b = call fast float @llvm.vector.reduce.fmin.v4f32(<4 x float> %a) 59 ret float %b 60} 61 62define double @test_v2f64(<2 x double> %a) nounwind { 63; CHECK-LABEL: test_v2f64: 64; CHECK: @ %bb.0: 65; CHECK-NEXT: .save {r11, lr} 66; CHECK-NEXT: push {r11, lr} 67; CHECK-NEXT: bl fmin 68; CHECK-NEXT: pop {r11, lr} 69; CHECK-NEXT: mov pc, lr 70 %b = call fast double @llvm.vector.reduce.fmin.v2f64(<2 x double> %a) 71 ret double %b 72} 73 74define fp128 @test_v2f128(<2 x fp128> %a) nounwind { 75; CHECK-LABEL: test_v2f128: 76; CHECK: @ %bb.0: 77; CHECK-NEXT: .save {r11, lr} 78; CHECK-NEXT: push {r11, lr} 79; CHECK-NEXT: .pad #16 80; CHECK-NEXT: sub sp, sp, #16 81; CHECK-NEXT: ldr r12, [sp, #36] 82; CHECK-NEXT: str r12, [sp, #12] 83; CHECK-NEXT: ldr r12, [sp, #32] 84; CHECK-NEXT: str r12, [sp, #8] 85; CHECK-NEXT: ldr r12, [sp, #28] 86; CHECK-NEXT: str r12, [sp, #4] 87; CHECK-NEXT: ldr r12, [sp, #24] 88; CHECK-NEXT: str r12, [sp] 89; CHECK-NEXT: bl fminl 90; CHECK-NEXT: add sp, sp, #16 91; CHECK-NEXT: pop {r11, lr} 92; CHECK-NEXT: mov pc, lr 93 %b = call fast fp128 @llvm.vector.reduce.fmin.v2f128(<2 x fp128> %a) 94 ret fp128 %b 95} 96