1; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s 2 3define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind { 4;CHECK-LABEL: vst4i8: 5;Check the alignment value. Max for this instruction is 256 bits: 6;CHECK: vst4.8 {d16, d17, d18, d19}, [r0:64] 7 %tmp1 = load <8 x i8>, <8 x i8>* %B 8 call void @llvm.arm.neon.vst4.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8) 9 ret void 10} 11 12;Check for a post-increment updating store with register increment. 13define void @vst4i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { 14;CHECK-LABEL: vst4i8_update: 15;CHECK: vst4.8 {d16, d17, d18, d19}, [r{{[0-9]+}}:128], r2 16 %A = load i8*, i8** %ptr 17 %tmp1 = load <8 x i8>, <8 x i8>* %B 18 call void @llvm.arm.neon.vst4.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 16) 19 %tmp2 = getelementptr i8, i8* %A, i32 %inc 20 store i8* %tmp2, i8** %ptr 21 ret void 22} 23 24define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind { 25;CHECK-LABEL: vst4i16: 26;Check the alignment value. Max for this instruction is 256 bits: 27;CHECK: vst4.16 {d16, d17, d18, d19}, [r0:128] 28 %tmp0 = bitcast i16* %A to i8* 29 %tmp1 = load <4 x i16>, <4 x i16>* %B 30 call void @llvm.arm.neon.vst4.p0i8.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 16) 31 ret void 32} 33 34define void @vst4i32(i32* %A, <2 x i32>* %B) nounwind { 35;CHECK-LABEL: vst4i32: 36;Check the alignment value. Max for this instruction is 256 bits: 37;CHECK: vst4.32 {d16, d17, d18, d19}, [r0:256] 38 %tmp0 = bitcast i32* %A to i8* 39 %tmp1 = load <2 x i32>, <2 x i32>* %B 40 call void @llvm.arm.neon.vst4.p0i8.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 32) 41 ret void 42} 43 44define void @vst4f(float* %A, <2 x float>* %B) nounwind { 45;CHECK-LABEL: vst4f: 46;CHECK: vst4.32 47 %tmp0 = bitcast float* %A to i8* 48 %tmp1 = load <2 x float>, <2 x float>* %B 49 call void @llvm.arm.neon.vst4.p0i8.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) 50 ret void 51} 52 53define void @vst4i64(i64* %A, <1 x i64>* %B) nounwind { 54;CHECK-LABEL: vst4i64: 55;Check the alignment value. Max for this instruction is 256 bits: 56;CHECK: vst1.64 {d16, d17, d18, d19}, [r0:256] 57 %tmp0 = bitcast i64* %A to i8* 58 %tmp1 = load <1 x i64>, <1 x i64>* %B 59 call void @llvm.arm.neon.vst4.p0i8.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 64) 60 ret void 61} 62 63define void @vst4i64_update(i64** %ptr, <1 x i64>* %B) nounwind { 64;CHECK-LABEL: vst4i64_update: 65;CHECK: vst1.64 {d16, d17, d18, d19}, [r{{[0-9]+}}]! 66 %A = load i64*, i64** %ptr 67 %tmp0 = bitcast i64* %A to i8* 68 %tmp1 = load <1 x i64>, <1 x i64>* %B 69 call void @llvm.arm.neon.vst4.p0i8.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) 70 %tmp2 = getelementptr i64, i64* %A, i32 4 71 store i64* %tmp2, i64** %ptr 72 ret void 73} 74 75define void @vst4i64_reg_update(i64** %ptr, <1 x i64>* %B) nounwind { 76;CHECK-LABEL: vst4i64_reg_update: 77;CHECK: vst1.64 {d16, d17, d18, d19}, [r{{[0-9]+}}], r{{[0-9]+}} 78 %A = load i64*, i64** %ptr 79 %tmp0 = bitcast i64* %A to i8* 80 %tmp1 = load <1 x i64>, <1 x i64>* %B 81 call void @llvm.arm.neon.vst4.p0i8.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) 82 %tmp2 = getelementptr i64, i64* %A, i32 1 83 store i64* %tmp2, i64** %ptr 84 ret void 85} 86 87define void @vst4Qi8(i8* %A, <16 x i8>* %B) nounwind { 88;CHECK-LABEL: vst4Qi8: 89;Check the alignment value. Max for this instruction is 256 bits: 90;CHECK: vst4.8 {d16, d18, d20, d22}, [r0:256]! 91;CHECK: vst4.8 {d17, d19, d21, d23}, [r0:256] 92 %tmp1 = load <16 x i8>, <16 x i8>* %B 93 call void @llvm.arm.neon.vst4.p0i8.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 64) 94 ret void 95} 96 97define void @vst4Qi16(i16* %A, <8 x i16>* %B) nounwind { 98;CHECK-LABEL: vst4Qi16: 99;Check for no alignment specifier. 100;CHECK: vst4.16 {d16, d18, d20, d22}, [r0]! 101;CHECK: vst4.16 {d17, d19, d21, d23}, [r0] 102 %tmp0 = bitcast i16* %A to i8* 103 %tmp1 = load <8 x i16>, <8 x i16>* %B 104 call void @llvm.arm.neon.vst4.p0i8.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) 105 ret void 106} 107 108define void @vst4Qi32(i32* %A, <4 x i32>* %B) nounwind { 109;CHECK-LABEL: vst4Qi32: 110;CHECK: vst4.32 111;CHECK: vst4.32 112 %tmp0 = bitcast i32* %A to i8* 113 %tmp1 = load <4 x i32>, <4 x i32>* %B 114 call void @llvm.arm.neon.vst4.p0i8.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1) 115 ret void 116} 117 118define void @vst4Qf(float* %A, <4 x float>* %B) nounwind { 119;CHECK-LABEL: vst4Qf: 120;CHECK: vst4.32 121;CHECK: vst4.32 122 %tmp0 = bitcast float* %A to i8* 123 %tmp1 = load <4 x float>, <4 x float>* %B 124 call void @llvm.arm.neon.vst4.p0i8.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) 125 ret void 126} 127 128;Check for a post-increment updating store. 129define void @vst4Qf_update(float** %ptr, <4 x float>* %B) nounwind { 130;CHECK-LABEL: vst4Qf_update: 131 ;CHECK: vst4.32 {d16, d18, d20, d22}, [r[[REG:[0-9]+]]]! 132;CHECK: vst4.32 {d17, d19, d21, d23}, [r[[REG]]]! 133 %A = load float*, float** %ptr 134 %tmp0 = bitcast float* %A to i8* 135 %tmp1 = load <4 x float>, <4 x float>* %B 136 call void @llvm.arm.neon.vst4.p0i8.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) 137 %tmp2 = getelementptr float, float* %A, i32 16 138 store float* %tmp2, float** %ptr 139 ret void 140} 141 142declare void @llvm.arm.neon.vst4.p0i8.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind 143declare void @llvm.arm.neon.vst4.p0i8.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind 144declare void @llvm.arm.neon.vst4.p0i8.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind 145declare void @llvm.arm.neon.vst4.p0i8.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32) nounwind 146declare void @llvm.arm.neon.vst4.p0i8.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i32) nounwind 147 148declare void @llvm.arm.neon.vst4.p0i8.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i32) nounwind 149declare void @llvm.arm.neon.vst4.p0i8.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind 150declare void @llvm.arm.neon.vst4.p0i8.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind 151declare void @llvm.arm.neon.vst4.p0i8.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32) nounwind 152