1; RUN: llc -march=hexagon -hexagon-expand-condsets=0 < %s | FileCheck %s 2 3; CHECK: cmp.gt 4; CHECK-NOT: r1 = p0 5; CHECK-NOT: p0 = r1 6; CHECK: mux 7 8%s.0 = type { i32 } 9%s.1 = type { i64 } 10 11@g0 = common global i16 0, align 2 12 13; Function Attrs: nounwind 14define void @f0(%s.0* nocapture %a0, %s.1* nocapture %a1, %s.1* nocapture %a2) #0 { 15b0: 16 %v0 = load i16, i16* @g0, align 2, !tbaa !0 17 %v1 = icmp eq i16 %v0, 3 18 %v2 = select i1 %v1, i32 -1, i32 34 19 %v3 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 0 20 %v4 = load i32, i32* %v3, align 4 21 %v5 = zext i32 %v4 to i64 22 %v6 = getelementptr inbounds %s.0, %s.0* %a0, i32 1, i32 0 23 %v7 = load i32, i32* %v6, align 4 24 %v8 = zext i32 %v7 to i64 25 %v9 = shl nuw i64 %v8, 32 26 %v10 = or i64 %v9, %v5 27 %v11 = getelementptr inbounds %s.1, %s.1* %a1, i32 0, i32 0 28 %v12 = load i64, i64* %v11, align 8, !tbaa !4 29 %v13 = tail call i64 @llvm.hexagon.M2.vrcmpyr.s0(i64 %v10, i64 %v12) 30 %v14 = tail call i64 @llvm.hexagon.S2.asr.i.p(i64 %v13, i32 14) 31 %v15 = lshr i64 %v14, 32 32 %v16 = trunc i64 %v15 to i32 33 %v17 = tail call i32 @llvm.hexagon.C2.cmpgti(i32 %v16, i32 0) 34 %v18 = trunc i64 %v14 to i32 35 %v19 = tail call i32 @llvm.hexagon.C2.mux(i32 %v17, i32 %v2, i32 %v18) 36 %v20 = zext i32 %v19 to i64 37 %v21 = getelementptr inbounds %s.1, %s.1* %a2, i32 2, i32 0 38 store i64 %v20, i64* %v21, align 8 39 ret void 40} 41 42; Function Attrs: nounwind readnone 43declare i64 @llvm.hexagon.M2.vrcmpyr.s0(i64, i64) #1 44 45; Function Attrs: nounwind readnone 46declare i64 @llvm.hexagon.S2.asr.i.p(i64, i32) #1 47 48; Function Attrs: nounwind readnone 49declare i32 @llvm.hexagon.C2.cmpgti(i32, i32) #1 50 51; Function Attrs: nounwind readnone 52declare i32 @llvm.hexagon.C2.mux(i32, i32, i32) #1 53 54attributes #0 = { nounwind } 55attributes #1 = { nounwind readnone } 56 57!0 = !{!1, !1, i64 0} 58!1 = !{!"short", !2} 59!2 = !{!"omnipotent char", !3} 60!3 = !{!"Simple C/C++ TBAA"} 61!4 = !{!5, !5, i64 0} 62!5 = !{!"long long", !2} 63