1; RUN: llc -march=hexagon -O0 < %s | FileCheck %s 2; CHECK: r{{[0-9]*}}:{{[0-9]*}} = rol(r{{[0-9]*}}:{{[0-9]*}},#4) 3 4target triple = "hexagon" 5 6@g0 = private unnamed_addr constant [33 x i8] c"%llx : Q6_P_rol_PI(LONG_MIN,0)\0A\00", align 1 7 8; Function Attrs: nounwind 9declare i32 @f0(i8*, ...) #0 10 11; Function Attrs: nounwind 12define i32 @f1() #0 { 13b0: 14 %v0 = alloca i32, align 4 15 %v1 = alloca i32, align 4 16 store i32 0, i32* %v0 17 store i32 0, i32* %v1, align 4 18 %v2 = call i64 @llvm.hexagon.S6.rol.i.p(i64 483648, i32 4) 19 %v3 = call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @g0, i32 0, i32 0), i64 %v2) #2 20 ret i32 0 21} 22 23; Function Attrs: nounwind readnone 24declare i64 @llvm.hexagon.S6.rol.i.p(i64, i32) #1 25 26attributes #0 = { nounwind "target-cpu"="hexagonv60" } 27attributes #1 = { nounwind readnone } 28attributes #2 = { nounwind } 29