1; RUN: llc -march=hexagon -O3 < %s | FileCheck %s 2 3; Test that unaligned load is enabled for 128B 4; CHECK-NOT: r{{[0-9]+}} = memw 5 6; Function Attrs: nounwind 7define void @f0(i8* noalias nocapture readonly %a0, i16* nocapture %a1) #0 { 8b0: 9 %v0 = bitcast i8* %a0 to <32 x i32>* 10 %v1 = load <32 x i32>, <32 x i32>* %v0, align 4, !tbaa !0 11 %v2 = tail call <32 x i32> @llvm.hexagon.V6.vrmpyub.128B(<32 x i32> %v1, i32 16843009) 12 %v3 = bitcast i16* %a1 to <32 x i32>* 13 store <32 x i32> %v2, <32 x i32>* %v3, align 128, !tbaa !0 14 ret void 15} 16 17; Function Attrs: nounwind readnone 18declare <32 x i32> @llvm.hexagon.V6.vrmpyub.128B(<32 x i32>, i32) #1 19 20attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" } 21attributes #1 = { nounwind readnone } 22 23!0 = !{!1, !1, i64 0} 24!1 = !{!"omnipotent char", !2, i64 0} 25!2 = !{!"Simple C/C++ TBAA"} 26