1; RUN: llc < %s | FileCheck %s 2 3; Test that Lanai select instruction is selected from LLVM select instruction. 4 5target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64" 6target triple = "lanai" 7 8; CHECK-LABEL: select_i32_bool: 9; CHECK: sub.f %r6, 0x0, %r0 10; CHECK: sel.ne %r7, %r18, %rv 11define i32 @select_i32_bool(i1 zeroext inreg %a, i32 inreg %b, i32 inreg %c) { 12 %cond = select i1 %a, i32 %b, i32 %c 13 ret i32 %cond 14} 15 16; CHECK-LABEL: select_i32_eq: 17; CHECK: sub.f %r6, 0x0, %r0 18; CHECK: sel.eq %r7, %r18, %rv 19define i32 @select_i32_eq(i32 inreg %a, i32 inreg %b, i32 inreg %c) { 20 %cmp = icmp eq i32 %a, 0 21 %cond = select i1 %cmp, i32 %b, i32 %c 22 ret i32 %cond 23} 24 25; CHECK-LABEL: select_i32_ne: 26; CHECK: sub.f %r6, 0x0, %r0 27; CHECK: sel.ne %r7, %r18, %rv 28define i32 @select_i32_ne(i32 inreg %a, i32 inreg %b, i32 inreg %c) { 29 %cmp = icmp ne i32 %a, 0 30 %cond = select i1 %cmp, i32 %b, i32 %c 31 ret i32 %cond 32} 33 34; CHECK-LABEL: select_i32_lt: 35; CHECK: sub.f %r6, %r7, %r0 36; CHECK: sel.lt %r6, %r7, %rv 37define i32 @select_i32_lt(i32 inreg %x, i32 inreg %y) #0 { 38 %1 = icmp slt i32 %x, %y 39 %2 = select i1 %1, i32 %x, i32 %y 40 ret i32 %2 41} 42