1# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s 2# This test ensures that the MIR parser parses the liveout register mask 3# machine operands correctly. 4 5--- | 6 7 define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { 8 entry: 9 %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 5, i8* null, i32 2, i64 %p1, i64 %p2) 10 ret void 11 } 12 13 declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...) 14 15... 16--- 17name: small_patchpoint_codegen 18tracksRegLiveness: true 19liveins: 20 - { reg: '$rdi' } 21 - { reg: '$rsi' } 22frameInfo: 23 hasPatchPoint: true 24 stackSize: 8 25 adjustsStack: true 26 hasCalls: true 27fixedStack: 28 - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16 } 29body: | 30 bb.0.entry: 31 liveins: $rdi, $rsi, $rbp 32 33 frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp 34 CFI_INSTRUCTION def_cfa_offset 16 35 CFI_INSTRUCTION offset $rbp, -16 36 $rbp = frame-setup MOV64rr $rsp 37 CFI_INSTRUCTION def_cfa_register $rbp 38 ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, $rdi, $rsi, csr_64, liveout($esp, $rsp, $sp, $spl), 39 PATCHPOINT 5, 5, 0, 2, 0, $rdi, $rsi, csr_64, liveout($esp, $rsp, $sp, $spl), implicit-def dead early-clobber $r11, implicit-def $rsp, implicit-def dead $rax 40 $rbp = POP64r implicit-def $rsp, implicit $rsp 41 RETQ 42... 43